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The desired accuracy can be programed based on calculation for each application. The DCC measures the

frequency of a selectable clock source using another input clock as a reference.

For more information, see Dual Clock Comparator (DCC) section in Peripherals chapter in the device TRM.

8.3.4.6 DDRSS

The DDR subsystem in this device comprises DDR controller, DDR PHY and wrapper logic to integrate these

blocks in the device. The DDR subsystem is referred to as DDRSS0 and is used to provide an interface to

external SDRAM devices which can be utilized for storing program or data. Specifically, the DDR subsystem

supports LPDDR4 devices compliant to the JEDEC JESD209-4B standard. DDRSS0 is accessed via MSMC,

and not directly through the system interconnect.

Note

The DDRSS does not support byte mode LPDDR4 memories, or memories with more than 17 row

address bits.

For more information, see DDR Subsystem (DDRSS) section in Peripherals chapter in the device TRM.

8.3.4.7 ECAP

The enhanced Capture (ECAP) module can be used for:

• Sample rate measurements of audio inputs

• Speed measurements of rotating machinery (for example, toothed sprockets sensed via Hall sensors)

• Elapsed time measurements between position sensor pulses

• Period and duty cycle measurements of pulse train signals

• Decoding current or voltage amplitude derived from duty cycle encoded current/voltage sensors.

For more information, see Enhanced Capture (ECAP) Module section in Peripherals chapter in the device TRM.

8.3.4.8 EPWM

An effective PWM peripheral must be able to generate complex pulse width waveforms with minimal CPU

overhead or intervention. It needs to be highly programmable and very flexible while being easy to understand

and use. The EPWM unit described here addresses these requirements by allocating all needed timing and

control resources on a per PWM channel basis. Cross coupling or sharing of resources has been avoided;

instead, the EPWM is built up from smaller single channel modules with separate resources and that can

operate together as required to form a system. This modular approach results in an orthogonal architecture and

provides a more transparent view of the peripheral structure, helping users to understand its operation quickly.

In the further description the letter x within a signal or module name is used to indicate a generic EPWM instance

on a device. For example, output signals EPWMxA and EPWMxB refer to the output signals from the EPWM_x

instance. Thus, EPWM1A and EPWM1B belong to EPWM1, EPWM2A and EPWM2B belong to EPWM2, and so

forth.

Additionally, the EPWM integration allows this synchronization scheme to be extended to the capture peripheral

modules (ECAP). The number of modules is device-dependent and based on target application needs. Modules

can also operate stand-alone.

For more information, see Enhanced Pulse Width Modulation (EPWM) Module section in Peripherals chapter in

the device TRM.

8.3.4.9 ELM

The Error Location Module (ELM) is used with the GPMC. Syndrome polynomials generated on-the-fly when

reading a NAND flash page and stored in GPMC registers are passed to the ELM. A host processor can then

correct the data block by flipping the bits to which the ELM error-location outputs point.

When reading from NAND flash memories, some level of error-correction is required. In the case of NAND

modules with no internal correction capability, sometimes referred to as bare NANDs, the correction process is

delegated to the memory controller. ELM can be also used to support parallel NOR flash or NAND flash.

For more information, see Error Location Module (ELM) section in Peripherals chapter in the device TRM.

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DRA821U-Q1

SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022

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