 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
DRA821U4...ALM 数据表(PDF) 231 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
DRA821U4...ALM 数据表(HTML) 231 Page - Texas Instruments |
|
|
231 / 252 page  Table 9-2. Independent MCU and Main Voltage Domain Power Rail Mapping TYPES VOLTAGE [V] DOMAIN NAMES DOMAIN GROUPS POWER RAILS # Digital IO 3.3 (VDDSHV0_MCU, VDDSHV1_MCU, VDDSHV2_MCU)1 VDDSHVn_MCU VDD_MCUIO_3V3 1 Digital IO 3.3 (VDDSHV0, VDDSHV2, VDDSHV53)2, VDDA_3P3_USB4 VDDSHVn, VDDA_3P3_USB11 VDD_IO_3V3 2 Digital IO 1.8 (VDDSHV0_MCU, VDDSHV1_MCU, VDDSHV2_MCU)2 VDDSHVn_MCU2 VDD_MCUIO_1V8 3 Digital IO 1.8 (VDDSHV0, VDDSHV2, VDDSHV53)2, VDDS_MMC0 VDDSHVn2 3 VDD_IO_1V8 4 Analog Clk, Meas 1.8 (VDDA_MCU_PLLGRP0, VDDA_MCU_TEMP, VDDA_ADC_MCU, VDDA_POR_WKUP, VDDA_WKUP)2 VDDA_MCU1P8_<clk/ meas> VDA_MCU_1V8 5 Analog Clk, Meas 1.8 VDDA_OSC1, VDDA_PLLGRP8,6,4,0, VDDA_TEMP1:0 VDDA_1P8_<clk/meas> VDA_PLL_1V8 6 Analog PHY 1.8 (VDDA_1P8_USB, VDDA_1P8_SERDES)6 VDDA_1P8_<phy>6 VDA_PHY_1V87 7 Analog, low voltage 0.80 (VDDA_0P8_PLL_DDR, VDDA_0P8_DLL_MMC0 )7 VDDA_0P8_DPLL VDA_DLL_0V8 8 Digital, low voltage 0.85 VDD_MCU8, VDD_MCU_WAKE1, VDDAR_MCU VDD_MCU VDDAR_MCU VDD_MCU_0V8 Digital, AVS low voltage 0.77 – 0.84 VDD_CPU VDD_CPU VDD_CPU_AVS 9 Digital, low voltage 0.80 VDD_CORE,VDD_WAK E0, (VDDA_0P8_SERDES, VDDA_0P8_USB) VDD_CORE VDDA_0P8_<phy> VDD_CORE_0V8 10 Digital, low voltage 0.85 VDDAR_CORE, VDDAR_CPU VDDAR VDD_RAM_0V85 11 Digital, low voltage 1.1 VDDS_DDR_BIAS, VDDS_DDR, VDDS_DDR_C VDDS_DDR VDD_DDR_1V1 12 1. Any MCU or Main dual voltage IO domains (VDDSHVn_MCU or VDDSHVn) being supplied by 3.3V to support 3.3V digital interfaces 2. Any MCU or Main dual voltage IO domains (VDDSHVn_MCU or VDDSHVn) being supplied by 1.8V to support 1.8V digital interfaces 3. VDDSHV5 supports MMC1 signaling for SD memory cards. A dual voltage (3.3/1.8V) power rail is required for compliant, high-speed SD card operations. If SD card is not needed or standard data rates with fixed 3.3V operation is acceptable, then domain can be grouped with digital IO 3.3V power rail. If a SD card is capable of operating with fixed 1.8V, then domain can be grouped with digital IO 1.8V power rail. 4. VDDA_3P3_USB is 3.3V analog domain used for USB 2.0 differential interface signaling. A low noise, analog supply is recommended to provide best signal integrity for USB data eye mask compliance. If USB interface is not needed or data bit errors can be tolerated, then domain can be grouped with 3.3V digital IO power rail either directly or through a supply filter. 5. VDDA_1P8_<clk/pll/ana> are 1.8V analog domains supporting clock oscillator, PLL and analog circuitry needing a low noise supply for optimal performance. It is not recommended to combine digital VDDSHVn_MCU and VDDSHVn IO domains since high frequency switching noise could negatively impact www.ti.com DRA821U-Q1 SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 231 Product Folder Links: DRA821U-Q1 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
