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H8SX1663 数据表(PDF) 211 Page - Renesas Technology Corp |
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H8SX1663 数据表(HTML) 211 Page - Renesas Technology Corp |
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211 / 1158 page  Section 6 Bus Controller (BSC) Rev.1.00 Jun. 07, 2006 Page 159 of 1102 REJ09B0294-0100 Bit Bit Name Initial Value R/W Description 4 3 2 0 0 0 R/W R R/W Reserved The initial value should not be changed. 1 0 MCX1 MCX0 0 0 R/W R/W Multiplexed Address Bit Select Select the number of bits by which a row address multiplexed with a column address is shifted to the lower side. At the same time, these bits select row address bits compared during a burst access to the DRAM/SDRAM interface. 00: Shifted by 8 bits A23 to A8 are compared for 8-bit access space A23 to A9 are compared for 16-bit access space 01: Shifted by 9 bits A23 to A9 are compared for 8-bit access space A23 to A10 are compared for 16-bit access space 10: Shifted by 10 bits A23 to A10 are compared for 8-bit access space A23 to A11 are compared for 16-bit access space 11: Shifted by 11 bits A23 to A11 are compared for 8-bit access space A23 to A12 are compared for 16-bit access space |
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