ZUSBOPTSC01ZACG datasheet(133/282 Pages) ZILOG

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PS022827-1212

P R E L I M I N A R Y

UART Control Register Definitions

Z8 Encore! XP® F082A Series

Product Specification

116

UART Receive Data Register

Data bytes received through the RXDx pin are stored in the UART Receive Data

(UxRXD) Register, shown in Table 68. The read-only UART Receive Data Register

shares a Register File address with the Write-only UART Transmit Data Register.

UART Address Compare Register

The UART Address Compare (UxADDR) Register stores the multi-node network address

of the UART (see Table 69). When the MPMD[1] bit of UART Control Register 0 is set,

all incoming address bytes are compared to the value stored in the Address Compare Reg-

ister. Receive interrupts and RDA assertions only occur in the event of a match.

Table 67. UART Transmit Data Register (U0TXD)

Bit

Field

TXD

RESET

XXXXXXXX

R/W

WWWWWWWW

Address

F40H

Note: X = Undefined.

Bit

Description

[7:0]



TXD

Transmit Data

UART transmitter data byte to be shifted out through the TXDx pin.

Table 68. UART Receive Data Register (U0RXD)

Bit

Field

RXD

RESET

XXXXXXXX

R/W

RRRRRRR

Address

F40H

Note: X = Undefined.

Bit

Description

[7:0]



RXD

Receive Data

UART receiver data byte from the RXDx pin.

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