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DRA821U4...ALM 数据表(PDF) 215 Page - Texas Instruments |
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DRA821U4...ALM 数据表(HTML) 215 Page - Texas Instruments |
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215 / 252 page  Table 7-78. OSPI DLL Delay Mapping for Timing Modes MODE OSPI_PHY_CONFIGURATION_REG BIT FIELD DELAY VALUE TRANSMIT 1.8 V PHY_CONFIG_TX_DLL_DELAY_FLD 0x54 3.3 V PHY_CONFIG_TX_DLL_DELAY_FLD 0x55 RECEIVE 1.8 V, DQS PHY_CONFIG_RX_DLL_DELAY_FLD 0x2D 3.3 V, DQS PHY_CONFIG_RX_DLL_DELAY_FLD 0x29 All other modes PHY_CONFIG_RX_DLL_DELAY_FLD 0x0 For more information, see Octal Serial Peripheral Interface (OSPI) section in Peripherals chapter in the device TRM. 7.9.5.19 PCIE The PCI-Express Subsystem is compliant with the PCIe® Base Specification, Revision 4.0. Refer to the specification for timing details. For more details about features and additional description information on the device Peripheral Component Interconnect Express, see the corresponding sections within Section 6.3, Signal Descriptions and Section 8, Detailed Description. For more information, see Peripheral Component Interconnect Express (PCIe) Subsystem section in Peripherals chapter in the device TRM. 7.9.5.20 Timers For more details about features and additional description information on the device Timers, see the corresponding sections within Section 6.3, Signal Descriptions and Section 8, Detailed Description. Table 7-79 represents Timers timing conditions. Table 7-79. Timers Timing Conditions PARAMETER DESCRIPTION MODE MIN MAX UNIT Input Conditions tSR Input slew rate CAPTURE 0.5 5 V/ns Output Conditions CLOAD Output load capacitance PWM 2 10 pF Section 7.9.5.20.1, Section 7.9.5.20.2 and Figure 7-110 present timings and switching characteristics of the Timers. 7.9.5.20.1 Timing Requirements for Timers NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT T1 tw(TINPH) Pulse duration, high CAPTURE 2.5 + 4P (1) ns T2 tw(TINPL) Pulse duration, low CAPTURE 2.5 + 4P (1) ns (1) P = functional clock period in ns. 7.9.5.20.2 Switching Characteristics for Timers NO. PARAMETER DESCRIPTION MODE MIN MAX UNIT T3 tw(TOUTH) Pulse duration, high PWM -2.5 + 4P (1) ns www.ti.com DRA821U-Q1 SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 215 Product Folder Links: DRA821U-Q1 |
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