H5GQ2H24AFR-R0C datasheet(127/172 Pages) HYNIX

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This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

responsability for use of circuits described. No patent licenses are implied.

Rev. 1.2 /Nov. 2011

127

H5GQ2H24AFR

6.2. AC & DC CHARACTERISTICS

All GDDR5 SGRAMs are designed for 1.5V typical voltage supplies. The interface of GDDR5 with

1.5V VDDQ will follow the POD15 specification. All AC and DC values are measured at the ball.

GDDR5 can optionally support 1.35V typical voltage supplies. For high speed operation the

POD135 spec should be met. Under certain circumstances it may be acceptable for a device during 1.35V

VDD/VDDQ operation to follow the POD15 specification since GDDR5 supports a wide range of speeds

and low frequency settings. Vendor datasheets should be consulted for details regarding 1.35V support.

Notes:

1. GDDR5 SGRAMs are designed to tolerate PCB designs with separate VDD and VDDQ power regulators.

Table 39 DC Operating Conditions

POD15

POD135

Parameter

Symbol

Min

Typ

Max

Min

Typ

Max

Unit Note

Device Supply Voltage

VDD

1.455

1.5

1.545

1.3095

1.35

1.3905

Output Supply Voltage

VDDQ

1.455

1.5

1.545

1.3095

1.35

1.3905

Reference Voltage for DQ and

DBI# pins

VREFD

0.69 *

VDDQ

0.71 *

VDDQ

0.69 *

VDDQ

0.71 *

VDDQ

V2,3

Reference Voltage for DQ and

DBI# pins

VREFD2

0.49 *

VDDQ

0.51 *

VDDQ

0.49 *

VDDQ

0.51 *

VDDQ

2,3,4

External Reference Voltage for

address and command

VREFC

0.69 *

VDDQ

0.71 *

VDDQ

0.69 *

VDDQ

0.71 *

VDDQ

DC Input Logic HIGH Voltage for

address and command

VIHA (DC)

VREFC +

0.15

VREFC +

0.135

DC Input Logic LOW Voltage for

address and command

VILA (DC)

VREFC ‐

0.15

VREFC ‐

0.135

DC Input Logic HIGH Voltage for

DQ and DBI# pins with VREFD

VIHD (DC)

VREFD +

0.10

VREFD +

0.09

DC Input Logic LOW Voltage for

DQ and DBI# pins with VREFD

VILD (DC)

VREFD ‐

0.10

VREFD ‐

0.09

DC Input Logic HIGH Voltage for

DQ and DBI# pins with VREFD2

VIHD2

(DC)

VREFD2 +

0.30

VREFD2 +

0.27

DC Input Logic LOW Voltage for

DQ and DBI# pins with VREFD2

VILD2

(DC)

VREFD2 ‐

0.30

VREFD2 ‐

0.27

Input Logic HIGH Voltage for

RESET#, SEN, MF

VIHR

VDDQ ‐

0.50

VDDQ ‐

0.50

Input Logic LOW Voltage for

RESET#, SEN, MF

VILR

0.30

Input logic HIGH voltage for

EDC1/2 (x16 mode detect)

VIHX

VDDQ ‐ 0.3

VDDQ ‐

0.3

Input logic LOW voltage for

EDC1/2 (x16 mode detect)

VILX

0.30

Input Leakage Current

Any Input 0V <= VIN <= VDDQ

(All other pins not under test = 0V)

μA

Output Leakage Current

(DQs are disabled; 0V <= Vout <=

VDDQ)

Ioz

μA

Output Logic LOW Voltage

VOL (DC)

0.62

0.56

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