H5GQ2H24AFR-R0C datasheet(122/172 Pages) HYNIX

122 / 172 page

This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any

responsability for use of circuits described. No patent licenses are implied.

Rev. 1.2 /Nov. 2011

122

H5GQ2H24AFR

5.22. TEMPERATURE SENSOR

GDDR5 SGRAMs incorporate a with digital temperature readout function. This function allows the con‐

troller to monitor the GDDR5 SGRAM die’s junction temperature and use this information to make sure

the device is operated within the specified temperature range or to adjust interface timings relative to tem‐

perature changes over time.

The is enabled by bit A6 in Mode Register 7 (MR7). In this case the temperature readout is valid after

tTSEN. Hynix applies 10us to tTSEN.

The temperature readout uses the DRAM Info mode feature. The digital value is driven asynchronously

on the DQ bus following the MRS command to Mode Register 3 (MR3) that sets bit A7 to 1 and bit A6 to 0.

The temperature readout will be continuously driven until an MRS command sets both bits to 0.

The GDDR5 SGRAM’s junction temperature is linearly encoded as shown in Table 34. Hynix has the read‐

out to a subset of four digital codes out of Table 34, corresponding to six temperature thresholds. 

Table 34 Readout Pattern

Temperature [°C]

Binary Temperature Readout

MF=0:

MF=1:

DQ[3:0]

DQ[27:24]

＜ 45

0001

0011

0111

> 105

1111

H5GQ2H24AFR-R0C 数据表(PDF) 122 Page - Hynix Semiconductor