CS5530 datasheet(30/241 Pages) NSC

部件名	CS5530

功能描述	Geode??CS5530 I/O Companion Multi-Function South Bridge

PDF	241 Pages

Scroll/Zoom	100%

制造商	NSC [National Semiconductor (TI)]

网页	http://www.national.com

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Revision 4.1

Signal Definitions (Continued)

DRQ[7:5],

DRQ[3:0]

Refer

Table

2-3

5VT

DMA Request - Channels [7:5], [3:0]

DRQ inputs are asserted by ISA DMA devices to request a DMA transfer.

The request must remain asserted until the corresponding DACK is

asserted.

DACK[7:5]#,

DACK[3:0]#

Refer

Table

2-3

DMA Acknowledge - Channels [7:5], [3:0]

DACK outputs are asserted to indicate when a DRQ is granted and the

start of a DMA cycle.

AF15

Terminal Count

TC signals the final data transfer of a DMA transfer.

2.2.5

ISA Bus Interface (Continued)

Signal Name

No.

Type

Description

2.2.6

ROM Interface

Signal Name

No.

Type

Description

KBROMCS#

AE4

Keyboard/ROM Chip Select

KBROMCS# is the enable pin for the BIOS ROM and for the keyboard

controller. For ROM accesses, KBROMCS# is asserted for ISA memory

accesses programmed at F0 Index 52h[2:0].

For keyboard controller accesses, KBROMCS# is asserted for I/O

accesses to I/O Ports 060h, 062h, 064h, and 066h.

CS5530 数据表(PDF) 30 Page - National Semiconductor (TI)

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