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CS5530 数据表(PDF) 76 Page - National Semiconductor (TI) |
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CS5530 数据表(HTML) 76 Page - National Semiconductor (TI) |
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76 / 241 page ![]() www.national.com 76 Revision 4.1 Functional Description (Continued) Figure 3-7. General Purpose Timer and UDEF Trap SMI Tree Example SMI# Asserted SMM software reads SMI Header If Bit X = 0 (Internal SMI) If Bit X = 1 (External SMI) Call internal SMI handler to take appropriate action Geode™ CS5530 F1BAR+Memory Read to Clear to determine top-level source of SMI F1BAR+Memory Offset 06h Read to Clear Bits [15:10] Bits [8:0] Bit 9 GTMR_TRP_SMI Offset 02h Geode™ to determine second-level source of SMI Bit 5 PCI_TRP_SMI Bit 4 UDEF3_TRP_SMI Bit 3 UDEF2_TRP_SMI Bit 2 UDEF1_TRP_SMI Bit 1 GPT2_SMI Bit 0 GPT1_SMI Take Appropriate Action Other_SMI Other_SMI If bit 9 = 1, Source of SMI is GP Timer or UDEF Trap Bits 15:6 RSVD Top Level Second Level SMI Deasserted after all SMI Sources are Cleared (i.e., Top and Second Levels - note some sources may have a Third Level) GXLV Processor |
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