CS5530 datasheet(65/241 Pages) NSC

65 / 241 page

Revision 4.1

www.national.com

Functional Description (Continued)

Table 3-21. Secondary Hard Disk Idle Timer and Trap Related Registers

Bit

Description

F0 Index 83h

Power Management Enable Register 4 (R/W)

Reset Value = 00h

Secondary Hard Disk Idle Timer Enable: Turn on Secondary Hard Disk Idle Timer Count Register (F0 Index ACh) and

generate an SMI when the timer expires: 0 = Disable; 1 = Enable.

If an access occurs in the address ranges selected in F0 Index 93h[4], the timer is reloaded with the programmed count.

Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[0].

Second level SMI status is reported at F0 Index 86h/F6h[4].

Secondary Hard Disk Trap: 0 = Disable; 1 = Enable.

If this bit is enabled and an access occurs in the address ranges selected in F0 Index 93h[4], an SMI is generated.

Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[0].

Second level SMI status is reported at F0 Index 86h/F6h[5].

F0 Index 93h

Miscellaneous Device Control Register (R/W)

Reset Value = 00h

Partial Secondary Hard Drive Decode: This bit is used to restrict the addresses which are decoded as secondary hard

drive accesses.

0 = Power management monitors all reads and writes I/O Port 170h-177h, 376h-377h (excludes writes to 377h)

1 = Power management monitors only writes to I/O Port 176h and 177h

F0 Index ACh-ADh

Secondary Hard Disk Idle Timer Count Register (R/W)

Reset Value = 0000h

15:0

Secondary Hard Disk Idle Timer Count: This idle timer is used to determine when the secondary hard disk is not in use

so that it can be powered down. The 16-bit value programmed here represents the period of secondary hard disk inactiv-

ity after which the system is alerted via an SMI. The timer is automatically reloaded with the count value whenever an

access occurs to the configured secondary hard disk’s data port (configured in F0 Index 93h[4]). The counter uses a 1

second timebase.

To enable this timer set F0 Index 83h[7] = 1.

Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[0].

Second level SMI status is reported at F0 Index 86h/F6h[4].

CS5530 数据表(PDF) 65 Page - National Semiconductor (TI)

CS5530 数据表(HTML) 65 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载

链接网址

CS5530 数据表(PDF) 65 Page - National Semiconductor (TI)

CS5530 数据表(HTML) 65 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表 下载

链接网址

数据表下载