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CS5530 数据表(PDF) 88 Page - National Semiconductor (TI) |
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CS5530 数据表(HTML) 88 Page - National Semiconductor (TI) |
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88 / 241 page ![]() www.national.com 88 Revision 4.1 Functional Description (Continued) Figure 3-10. Limited ISA Mode Figure 3-11. ISA Master Mode Notes: 1. F0 Index 43h[2] controls GPIO[7:4]/SA[23:20]. 2. These signals are: MEMW#, MEMR#, IOR#, IOW#, TC, AEN, DREQ[7:5, 3:0], DACK[7:5, 3:0]#, MEMCS16#, ZEROWS#, SBHE#, IOCS16#, IOCHRDY, ISACLK. 3. This resistor is used at boot time to determine the mode of the ISA bus. Q D ISA Control2 SD[15:0] SA[23:20] SA[19:16] SA[15:0] 1GPIO[7:4]/SA[23:20] SA[19:16] SA[15:0]/SD[15:0] SA_LATCH/SA_DIR 10K3 74F373x2 G OC ISA Device Geode™ INTR CS5530 B A ISA Control2 SMEMW# MASTER# SA[23:20] SA[19:16] FP_VSYNC_OUT/SMEMR# 1GPIO[7:4]/SA[23:20] SA[19:16] FP_DATA16/SA_OE# SA_DIR 10K3 74L245x2 OE# T/R ISA Master SMEMR# FP_HSYNC_OUT/SMEMW# FP_DATA17/MASTER# FP_DATA[15:0]/SA[15:0] SA[15:0] SA_LATCH/SA_DIR SA_OE# SA[15:0]_SD[15:0]/SD[15:0] SD[15:0] Geode™ Notes: 1. When strapped for ISA Master mode, GPIO[7:4]/SA[23:20] are set to SA[23:20] and the settings in F0 Index 43h[2] are invalid. 2. These signals are: MEMW#, MEMR#, IOR#, IOW#, TC, AEN, DREQ[7:5, 3:0], DACK[7:5, 3:0]#, MEMCS16#, ZEROWS#, SBHE#, IOCS16#, IOCHRDY, ISACLK. 3. This resistor is used at boot time to determine the mode of the ISA bus. INTR 5.0V 3.3V 330 Ω CS5530 |
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