| 数据搜索系统,热门电子元器件搜索 |
|
CS5530 数据表(PDF) 46 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
CS5530 数据表(HTML) 46 Page - National Semiconductor (TI) |
|
46 / 241 page ![]() www.national.com 46 Revision 4.1 Functional Description (Continued) 3.2.2 PCI Target The CS5530 positively decodes PCI transactions intended for any internal registers, the ROM address range, and several peripheral and user-defined address ranges. For positive-decoded transactions, the CS5530 is a medium responder. Table 3-3 lists the valid C/BE# encoding for PCI target transactions. The CS5530 acts as the subtractive agent in the system since it contains the ISA bridge functionality. Subtractive decoding ensures that all accesses not positively claimed by PCI devices are forwarded to the ISA bus. The subtrac- tive-decoding sample point can be configured as slow, default, or disabled via F0 Index 41h[2:1]. Table 3-4 shows these programming bits. Figure 3-4 shows the timing for subtractive decoding. Figure 3-4. Subtractive Decoding Timing Table 3-3. PCI Command Encoding C/BE[3:0]# Command Type 0000 Interrupt Acknowledge 0001 Special Cycles: Shutdown, AD[15:0] = 0000 Special Cycles: Halt, AD[15:0] = 0001 0010 I/O Read 0011 I/O Write 010x Reserved 0110 Memory Read 0111 Memory Write 100x Reserved 1010 Configuration Read 1011 Configuration Write 1100 Memory Read Multiple (memory read only) 1101 Reserved 1110 Memory Read Line (memory read only) 1111 Memory Write, Invalidate (memory write) Table 3-4. Subtractive Decoding Related Bits Bit Description F0 Index 41h PCI Function Control Register 2 (R/W) Reset Value = 10h 2:1 Subtractive Decode: These bits determine the point at which the CS5530 accepts cycles that are not claimed by another device. The CS5530 defaults to taking subtractive decode cycles in the default cycle clock, but can be moved up to the Slow Decode cycle point if all other PCI devices decode in the fast or medium clocks. Disabling subtractive decode must be done with care, as all ISA and ROM cycles are decoded subtractively. 00 = Default sample (4th clock from FRAME# active) 01 = Slow sample (3rd clock from FRAME# active) 1x = No subtractive decode PCI_CLK FRAME# IRDY# TRDY# DEVSEL# FAST MED SLOW SUB |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |