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CS5530 数据表(PDF) 12 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 CS5530
功能描述  Geode??CS5530 I/O Companion Multi-Function South Bridge
PDF  241 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

CS5530 数据表(HTML) 12 Page - National Semiconductor (TI)

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12
Revision 4.1
2.0
Signal Definitions
This section defines the signals and describes the exter-
nal interface of the Geode CS5530. Figure 2-1 shows the
pins organized by their functional groupings (internal test
and electrical pins are not shown).
Figure 2-1. CS5530 Signal Groups
AD[31:0]
C/BE[3:0]#
PAR
HOLD_REQ#
FRAME#
TRDY#
STOP#
LOCK#
DEVSEL#
REQ#
GNT#
SERR#
INTA#-INTD#
IRQ13
INTR
SMI#
IDE_DACK1#
IDE_IORDY0
ROM Interface
PCI Bus
CPU Interface
IDE Controller
PSERIAL
SUSP#
SUSPA#
KBROMCS#
IRDY#
PERR#
SUSP_3V
IDE_IOW1#
IDE_IOW0#
IDE_IOR0#
IDE_IOR1#
Geode™ CS5530
IDE_DATA[15:0]
IDE_ADDR[2:0]
IDE_RST#
IDE_CS0#
IDE_CS1#
IDE_DREQ1
IDE_DACK0#
IDE_DREQ0
IDE_IORDY1
TVCLK
DCLK
PCICLK
ISACLK
Clocks
CLK_32K
CLK14_MHZ
Reset
PCI_RST#
POR#
CPU_RST
USBCLK
D+_PORT1
D–_PORT1
D+_PORT2
D–_PORT2
USB
POWER_EN
OVER_CUR#
SDATA_OUT
SDATA_IN
SYNC
BIT_CLK
PC_BEEP
Audio Interface
I/O Companion
VREF
EXTVREFIN
PCLK
IOUTG
IOUTB
AVSS1-5
IOUTR
AVDD1-3
HSYNC_OUT
HSYNC
VSYNC
PIXEL[23:0]
FP_DATA17 (MASTER#)
FP_CLK (No Function)
Display: Pixel
Display: CRT
ENA_DISP
VSYNC_OUT
DDC_SCL
DDC_SDA
FP_HSYNC_OUT (SMEMW#)
FP_CLK_EVEN (No Function)
FP_VSYNC_OUT (SMEMR#)
IREF
FP_DISP_ENA_OUT (No Function)
FP_ENA_VDD (No Function)
FP_ENA_BKL (No Function)
FP_HSYNC (No Function)
FP_VSYNC (No Function)
Analog
Display: MPEG
PLLDVD
PLLVAA
PLLRO
PLLLP
PLLAGS
DCLKPLL
Analog
Port
PLLAGD
PLLDGN
VID_RDY
VID_VAL
VID_CLK
VID_DATA[7:0]
SA[19:16]
(SA_DIR) SA_LATCH
SBHE#
BALE
IOCHRDY
ZEROWS#
IOR#
IOW#
MEMCS16#
MEMR#
MEMW#
AEN
DRQ[7:5], [3:0]
DACK#[7:5], [3:0]
TC
IRQ[15:14], [12:9], [7:3], 1
ISA Bus
IRQ8#
IOCS16#
(SD[15:0]) SA[15:0]/SD[15:0]
GPCS#
GPORT_CS#
(SA[23:20]) GPIO[7:4]/SA[23:20]
GPIO[3:2]
GPIO1/SDATA_IN2
GPIO0
Game Port/
GPIO
SMEMW#/RTCCS#
SMEMR#/RTCALE
FP_DATA16 (SA_OE#)
FP_DATA[15:0] (SA[15:0])
External RTC
Display: TFT/TV
Note: Pins that change
function when ISA Master
mode is invoked are repre-
sented with the ISA Mas-
ter Mode function signal
name in parenthesis.



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