 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
PC87373 数据表(PDF) 22 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
PC87373 数据表(HTML) 22 Page - National Semiconductor (TI) |
|
|
22 / 174 page  1.0 Signal/Pin Connection and Description (Continued) 22 www.national.com Revision 1.1 1.4.10 System Wake-Up Control (SWC) 1.4.11 Clocks Signal Pin(s) I/O Buffer Type Power Well Description GPIOE00-07, GPIOE10-13 103-106, 108-109, 111-116 IINTS VSB3 Wake-Up Inputs. Generates a wake-up event. These pins have programmable debouncing. When GPIOE functionality of a pin is not required, the internal pull-up resistor must be enabled to allow the pin to be left floating. RI1 RI2 32, 119 IINTS VSB3 Ring Indicator Wake-Up. When low, generates a wake-up event, indicating that a telephone ring signal was received by the modem. KBCLK 3 I INTS VSB3 Keyboard Clock Wake-Up. Generates a wake-up event, when a specific keyboard sequence is detected. KBDAT 4 I INTS VSB3 Keyboard Data Wake-Up. Generates a wake-up event, when a specific keyboard sequence is detected. MCLK 1 I INTS VSB3 Mouse Clock Wake-Up. Generates a wake-up event, when a specific mouse action is detected. MDAT 2 I INTS VSB3 Mouse Data Wake-Up. Generates a wake-up event, when a specific mouse action is detected. SIOPME 99 O OD8,O4/8 VSB3 Power Management Event (SCI). Active level indicates that a wake-up event occurred, causing the system to exit its current sleep state. This signal has programmable polarity (default is active low). SLP_S3, SLP_S5 85 86 IINTS4 VSB3 Sleep States 3 to 5. Active (low) level indicates the system is in one of the sleep states S3 or S5. These signals are generated by an external ACPI controller. Pins SLPS3 SLPS5 Functionality 1 1: Working state (S0) or Sleep states S1 or S2 0 1: Sleep state S3 0 0: Sleep state S5 1 0: Illegal combination YLW_LED, GRN_LED 95, 94 O OD24 VSB3 Power LEDs. Yellow and green LED drivers. Each indicates the Main power status or blinks under software control. Signal Pin(s) I/O Buffer Type Power Well Description CLOCKI32 91 I INTS VSB3 Low-Frequency Clock Input. 32.768 KHz clock for the SWC and Glue Functions timing. CLOCKI14 65 I INTS VDD3 High-Frequency Clock Input. 14.31818 MHz clock for the on- chip, 48 MHz Clock Generator (for the Legacy modules and FSCM). |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
