PC87373 datasheet(93/174 Pages) NSC

93 / 174 page

6.0 System Wake-Up Control (SWC) (Continued)

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Revision 1.1

6.3.6

LED Blink Control Register (LEDBLNK)

This register controls the advanced blinking rate of the two LEDs connected to pins GRN_LED and YLW_LED of the

PC87373 device. It is reset to 70h.

Power Well: VSB3

Location:

Offset 03h, when LED_OPT = 00 in the SWC_CTL register

Type:

R/W

Bit

43210

Name

Reserved

GRNBLNK

Reserved

YLWBLNK

Reset

10000

Bit

Description

Reserved.

6-4

GRNBLNK (Green LED Blink Rate). These bits control the blinking rate of GRN_LED output.

Bits

6 5 4

Rate (Hz)

Duty Cycle

0 0 0:

Off

Always inactive

0 0 1:

0.25

12.5%

0 1 0:

0.5

25%

0 1 1:

50%

1 0 0:

50%

1 0 1:

50%

1 1 0:

50%

1 1 1:

Always active (default)

Reserved.

2-0

YLWBLNK (Yellow LED Blink Rate). These bits control the blinking rate of YLW_LED output.

Bits

2 1 0

Rate (Hz)

Duty Cycle

0 0 0:

Off

Always inactive (default)

0 0 1:

0.25

12.5%

0 1 0:

0.5

25%

0 1 1:

50%

1 0 0:

50%

1 0 1:

50%

1 1 0:

50%

1 1 1:

Always active

PC87373 数据表(PDF) 93 Page - National Semiconductor (TI)

PC87373 数据表(HTML) 93 Page - National Semiconductor (TI)

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