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PC87373 数据表(PDF) 26 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 PC87373
功能描述  LPC SuperI/O with Glue Functions
PDF  174 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

PC87373 数据表(HTML) 26 Page - National Semiconductor (TI)

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1.0 Signal/Pin Connection and Description (Continued)
26
www.national.com
Revision 1.1
SLCT
33
VDD3
PD120
SLIN_ASTRB
47
VDD3
PU440
STB_WRITE
51
VDD3
PU440
Keyboard and Mouse Controller (KBC)
KBRST
7
VDD3
PU30
GA20
5
VDD3
PU30
System Wake-Up Control (SWC)
SIOPME
99
VSB3
PU30
Programmable1
Game Port (GMP)
JYABT0
113
VDD3
PU30
Programmable2
JYABT1
114
VDD3
PU30
Programmable2
JYBBT0
115
VDD3
PU30
Programmable2
JYBBT1
116
VDD3
PU30
Programmable2
Musical Instrument Digital Interface (MIDI) Port
MDRX
90
VDD3
PU30
Programmable2
General-Purpose Input/Output (GPIO) Ports
GPIOE00-07
106-103, 108, 109,
111, 112
VSB3
PU30
Programmable2
GPIOE10-13
116, 114, 115, 113
VSB3
PU30
Programmable2
GPIO14
101
VSB3
PU30
Programmable2
Glue Functions
PWRGD_PS
82
VSB3
PU90
CPU_PRESENT
83
VSB3
PU90
FPRST
75
VSB3
PU90
PRIMARY_HD
67
VDD3
PU90
SECONDARY_HD
68
VDD3
PU90
SCSI
69
VDD3
PU90
Strap Configuration
BADDR
30
VDD3
PU30
Strap3
TRIS
26
VDD3
PU30
Strap3
TEST
27
VDD3
PU30
Strap3
1. Enabled only when the OD6 buffer type is selected (OD6 is the default at reset).
2. Default at reset: disabled.
3. Active only during VDD Power-Up reset.
Table 3. Internal Pull-Up and Pull-Down Resistors (Continued)
Signal
Pin(s)
Power Well
Type
Comments



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