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PC87373 数据表(PDF) 60 Page - National Semiconductor (TI) |
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PC87373 数据表(HTML) 60 Page - National Semiconductor (TI) |
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60 / 174 page  3.0 Device Architecture and Configuration (Continued) 60 www.national.com Revision 1.1 3.13 KEYBOARD AND MOUSE CONTROLLER (KBC) CONFIGURATION 3.13.1 General Description The KBC is implemented physically as a single hardware module and houses two separate logical devices: a Mouse con- troller (Logical Device 5) and a Keyboard controller (Logical Device 6). The KBC is functionally equivalent to the industry standard 8042A Keyboard controller. Technical references for the standard 8042A Keyboard Controller may serve as de- tailed technical references for the KBC. The Keyboard and Mouse Controller runtime registers are described in Section 12.4 on page 149. All the registers are VDD3 powered. 3.13.2 Logical Devices 5 and 6 (Mouse and Keyboard) Configuration Tables 21 and 22 list the configuration registers that affect the Mouse and Keyboard logical devices. Only the last register (F0h) is described here. See Section 3.2.3 on page 36 for descriptions of the other configuration registers. The KBC module is activated and the access to the runtime registers (pointed at by the base addresses at indexes 60h-63h) is enabled when either the Mouse logical device (5) or the Keyboard logical device (6) is activated (by setting the activation bit at index 30h). Because the IRQ configuration resources are separate for each logical device (Mouse or Keyboard), the specific logical de- vice must be activated to enable its IRQ resources. All of these registers are VDD3 powered, with the exception of the KBC Configuration register (F0h), which is both VDD3 and VSB3 powered. Table 21. Mouse Configuration Registers Index Mouse Configuration Register or Action Type Power Well Reset 30h Activate (see Section 3.2.3 on page 36). When the Mouse of the KBC is inactive, the IRQ selected by the Mouse Interrupt Number and Wake-Up on IRQ Enable register (index 70h) are not asserted. R/W VDD3 00h 70h Mouse Interrupt Number and Wake-Up on IRQ Enable register R/W VDD3 0Ch 71h Mouse Interrupt Type. Bits 1,0 are read/write; other bits are read only. R/W VDD3 02h 74h Report no DMA assignment RO VDD3 04h 75h Report no DMA assignment RO VDD3 04h Table 22. Keyboard Configuration Registers Index Keyboard Configuration Register or Action Type Power Well Reset 30h Activate (see Section 3.2.3 on page 36). When the Keyboard of the KBC is inactive, the IRQ selected by the Keyboard Interrupt Number and Wake-Up on IRQ Enable register (index 70h) are not asserted. R/W VDD3 00h 60h Base Address MSB register. Bits 7-3 (for A15-11) are read only, ‘00000’. R/W VDD3 00h 61h Base Address LSB register. Bits 2-0 (for A2-0) are read-only, ‘000’. R/W VDD3 60h 62h Command Base Address MSB register. Bits 7-3 (for A15-11) are read only, ‘00000’. R/W VDD3 00h 63h Command Base Address LSB. Bits 2-0 (for A2-0) are read-only, ‘100’. R/W VDD3 64h 70h KBD Interrupt Number and Wake-Up on IRQ Enable register R/W VDD3 01h 71h KBD Interrupt Type. Bits 1,0 are read/write; others are read only. R/W VDD3 02h 74h Report no DMA assignment RO VDD3 04h 75h Report no DMA assignment RO VDD3 04h F0h KBC Configuration register R/W VDD3/VSB3 40h |
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