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PC87373 数据表(PDF) 43 Page - National Semiconductor (TI) |
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PC87373 数据表(HTML) 43 Page - National Semiconductor (TI) |
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43 / 174 page ![]() 3.0 Device Architecture and Configuration (Continued) 43 www.national.com Revision 1.1 3.6 REGISTER TYPE ABBREVIATIONS The following abbreviations are used to indicate the Register Type: q R/W = Read/Write. q R = Read from register (data written to this address is sent to a different register). q W = Write (see above). q RO = Read Only. q WO = Write Only. Reading from the bit returns 0. q R/W1C = Read/Write 1 to Clear. Writing 1 to a bit clears it to 0. Writing 0 has no effect. q R/W1S = Read/Write 1 to Set. Writing 1 to a bit sets its value to 1. Writing 0 has no effect. In the registers below, use one of the following methods to handle the reserved bits: q Write 0 to reserved bits, unless another “required value” is specified. This method can be used for registers contain- ing bits of all types. q Use read-modify-write to preserve the values of the reserved bits. This method can be used only for registers con- taining bits of R/W, RO, R/W1C and R/W1S types. 3.7 PC87373 CONFIGURATION REGISTERS This section describes the PC87373 configuration and ID registers (i.e., registers with first level indexes in the range of 20h −2Fh). See Table 15 for a summary and directory of these registers. 3.7.1 SuperI/O ID Register (SID) This register contains the identity number of the device family. The PC87373 family is identified by the value F3h. Power Well: VSB3 Location: Index 20h Type: RO Table 15. SuperI/O Configuration Registers Index Mnemonic Register Name Power Well Type Section 20h SID SuperI/O ID VSB3 RO 3.7.13.7.1 21h SIOCF1 SuperI/O Configuration 1 VDD3 Varies per bit 3.7.2 22h SIOCF2 SuperI/O Configuration 2 VSB3 R/W or RO 3.7.3 23h SIOCF3 SuperI/O Configuration 3 VSB3 R/W or RO 3.7.4 24h SIOCF4 SuperI/O Configuration 4 VSB3 R/W or RO 3.7.5 25h Reserved 26h SIOCF6 SuperI/O Configuration 6 VDD3 Varies per bit 3.7.6 27h SRID SuperI/O Revision ID VSB3 RO 3.7.7 28h Reserved 29h CLOCKCF Clock Generator Control VSB3 Varies per bit 3.7.8 2Ah-2Fh Reserved for National use Bit 76543210 Name Family ID Reset F3h Bit Description 7 −0 Family ID. Identifies a family of devices with similar functionality but with different implemented options. |
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