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PC87373 数据表(PDF) 11 Page - National Semiconductor (TI) |
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PC87373 数据表(HTML) 11 Page - National Semiconductor (TI) |
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11 / 174 page ![]() Table of Contents (Continued) 11 www.national.com Revision 1.1 11.2.5 MIDI Signals Routing Control Logic ........................................................................... 132 11.2.6 Operation Modes ....................................................................................................... 132 11.2.7 MIDI Port Status Flags .............................................................................................. 133 11.2.8 MIDI Port Interrupts ................................................................................................... 134 11.2.9 Enhanced MIDI Port Features ................................................................................... 134 11.3 MIDI PORT REGISTERS ........................................................................................................ 136 11.3.1 MIDI Port Register Map ............................................................................................. 136 11.3.2 MIDI Data In Register (MDI) ...................................................................................... 136 11.3.3 MIDI Data Out Register (MDO) ................................................................................. 136 11.3.4 MIDI Status Register (MSTAT) .................................................................................. 137 11.3.5 MIDI Command Register (MCOM) ............................................................................ 138 11.3.6 MIDI Control Register (MCNTL) ................................................................................ 138 11.4 MIDI PORT BITMAP .............................................................................................................. 139 12.0 Legacy Functional Blocks 12.1 FLOPPY DISK CONTROLLER (FDC) ..................................................................................... 140 12.1.1 General Description ................................................................................................... 140 12.1.2 FDC Bitmap Summary ............................................................................................... 141 12.2 PARALLEL PORT .................................................................................................................... 142 12.2.1 General Description ................................................................................................... 142 12.2.2 Parallel Port Register Map ......................................................................................... 142 12.2.3 Parallel Port Bitmap Summary .................................................................................. 143 12.3 UART FUNCTIONALITY (SERIAL PORT 1 AND SERIAL PORT 2) ....................................... 145 12.3.1 General Description ................................................................................................... 145 12.3.2 UART Register Bank Overview ................................................................................. 145 12.3.3 SP1 and SP2 Register Maps .................................................................................... 145 12.3.4 SP1 and SP2 Bitmap Summary ............................................................................... 147 12.4 KEYBOARD AND MOUSE CONTROLLER (KBC) .................................................................. 149 12.4.1 General Description ................................................................................................... 149 12.4.2 KBC Register Map ..................................................................................................... 150 12.4.3 KBC Bitmap Summary ............................................................................................... 150 13.0 Device Characteristics 13.1 GENERAL DC ELECTRICAL CHARACTERISTICS ............................................................... 151 13.1.1 Recommended Operating Conditions ....................................................................... 151 13.1.2 Absolute Maximum Ratings ....................................................................................... 151 13.1.3 Capacitance .............................................................................................................. 151 13.1.4 Power Consumption under Recommended Operating Conditions ............................ 152 13.1.5 Voltage Thresholds .................................................................................................... 152 13.2 DC CHARACTERISTICS OF PINS, BY I/O BUFFER TYPES ................................................ 153 13.2.1 Input, Game Port Compatible with Schmitt Trigger ................................................... 153 13.2.2 Input, TTL Compatible ............................................................................................... 153 13.2.3 Input, TTL Compatible, with Schmitt Trigger ............................................................. 153 13.2.4 Input, TTL Compatible, with 400 mV Schmitt Trigger ................................................ 154 13.2.5 Input, PCI 3.3V Compatible ....................................................................................... 154 13.2.6 Analog Input .............................................................................................................. 154 |
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