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数据搜索系统，热门电子元器件搜索 |
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PC87373 数据表(PDF) 66 Page - National Semiconductor (TI) |
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PC87373 数据表(HTML) 66 Page - National Semiconductor (TI) |
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66 / 174 page  3.0 Device Architecture and Configuration (Continued) 66 www.national.com Revision 1.1 3.14.6 GPIO Pin Configuration Register 2 (GPCFG2) This register controls the connection of the GPIO pin to a VDD-powered load. An exception to this is GPIO14 pin of Port 1, which lacks the GPCFG2 configuration register (the register is reserved and the pin is configured for VSB3-powered load). GPCFG2 is reset to 00h. Power Well: VSB3 Location: Index F3h Type: R/W or RO 3.14.7 GPIO Mode Select Register (GPMODE) This register controls the operation mode of the GPIO runtime registers (see Section 5.1 on page 73). GPMODE is reset to 01h. Power Well: VSB3 Location: Index F8h Type: R/W or RO Bit 76543210 Name Reserved VDDLOAD Reserved Reset 00000000 Bit Description 7-5 Reserved. 4 VDDLOAD (VDD3-Powered Load). This bit indicates that the selected GPIO pin is connected to a device powered by VDD3. The input and output buffers (including the internal pull-up) of the selected GPIO pin are disabled whenever VDD3 power to the PC87373 device falls below a certain value (see Section 13.1.5 on page 152). 0: GPIO pin connected to a VSB3-powered load (default): The configuration and data of the GPIO pin are reset by VSB Power-Up reset (see Section 2.2 on page 29). 1: GPIO pin connected to a VDD3-powered load: The configuration (excepting the VDDLOAD bit) and data of the GPIO pin are reset by VDD Power-Up reset, Hardware reset or Software reset (see Section 2.2 on page 29). 3-0 Reserved. Bit 76543210 Name Reserved SEPDIO Reset 00000001 Bit Description 7-1 Reserved. 0 SEPDIO (Separate Data I/O Select). This bit selects the operation mode of the GPIO runtime registers by controlling the GPDOn, GPEVENn and GPEVSTn runtime registers to read-only (n is the Port number, 0 or 1). 0: Common Data I/O mode (GPDOn, GPEVENn and GPEVSTn registers are read-only, and data written to them is ignored) 1: Separate Data I/O mode (default) |
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