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数据搜索系统，热门电子元器件搜索 |
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PC87373 数据表(PDF) 97 Page - National Semiconductor (TI) |
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PC87373 数据表(HTML) 97 Page - National Semiconductor (TI) |
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97 / 174 page  6.0 System Wake-Up Control (SWC) (Continued) 97 www.national.com Revision 1.1 6.4 ACPI REGISTERS The ACPI registers are organized in two groups, which are both powered by VSB3. The offsets of the two groups of ACPI registers are related to the base address determined by the Base Address registers at indexes 62h-63h in the SWC device configuration. The PC87373 device supports the General-Purpose Event 1, ACPI generic register group. This group contains the GPE1_STS and GPE1_EN registers, each with a length of one byte. In addition, the device supports the “child” events of the General-Purpose Event 1 register group in the GPE1_STS_0-GPE1_STS_3 and the GPE1_EN_0-GPE1_EN_3 regis- ters. The following abbreviations are used to indicate the Register Type: q R/W = Read/Write. q R = Read from register (data written to this address is sent to a different register). q W = Write (see above). q RO = Read Only. q WO = Write Only. Reading from the bit returns 0. q R/W1C = Read/Write 1 to Clear. Writing 1 to a bit clears it to 0. Writing 0 has no effect. q R/W1S = Read/Write 1 to Set. Writing 1 to a bit sets its value to 1. Writing 0 has no effect. 6.4.1 ACPI Register Map The following table lists the ACPI registers. All of these registers are VSB3 powered. Table 37. ACPI Register Map Base Registers Offset Mnemonic Register Name Type Power Well Section At index 62h, 63h 00h GPE1_STS General-Purpose Status 1 Register R/W1C VSB3 6.4.2 01h-03h Reserved 04h GPE1_EN General-Purpose Enable 1 Register R/W VSB3 6.4.3 05h-07h Reserved 08h GPE1_STS_0 General-Purpose Status 1 Register 0 R/W1C VSB3 6.4.4 09h GPE1_STS_1 General-Purpose Status 1 Register 1 R/W1C VSB3 6.4.5 0Ah GPE1_STS_2 General-Purpose Status 1 Register 2 R/W1C VSB3 6.4.6 0Bh GPE1_STS_3 General-Purpose Status 1 Register 3 R/W1C VSB3 6.4.7 0Ch GPE1_EN_0 General-Purpose Enable 1 Register 0 R/W VSB3 6.4.8 0Dh GPE1_EN_1 General-Purpose Enable 1 Register 1 R/W VSB3 6.4.9 0Eh GPE1_EN_2 General-Purpose Enable 1 Register 2 R/W VSB3 6.4.10 0Fh GPE1_EN_3 General-Purpose Enable 1 Register 3 R/W VSB3 6.4.11 |
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