PC87373 datasheet(40/174 Pages) NSC

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3.0 Device Architecture and Configuration (Continued)

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3.3 MODULE CONTROL

Module control is performed primarily through the Activation bit (bit 0 of index 30h) of each logical device.

3.3.1

Module Enable/Disable

Module control is performed primarily through the Activation bit (bit 0 of index 30h) of each logical device. The operation of

each module can be controlled by the host through the LPC bus.

Module enable/disable by the host through the LPC bus is controlled by the following bits:

Activation bit (bit 0) in index 30h of the Standard configuration registers (see Section 3.2.3 on page 36)

Fast Disable bit in SIOCF6 register; for the FDC, Parallel Port and Serial Port (1 and 2) modules only (see Section

3.7.6 on page 47)

Global Enable bit (GLOBEN) in SIOCF1 register (see Section 3.7.2 on page 44)

A module is enabled only if all of these bits are set to their “enable” value.

When a VDD3-powered module (FDC, Parallel Port, Serial Ports, KBC, MIDI Port and Game Port, FSCM) is disabled, the

following takes place:

The host system resources of the logical device (IRQ, DMA and runtime address range) are unassigned.

Access to the standard- and device-speciﬁc Logical Device conﬁguration registers through the LPC bus remains en-

abled.

Access to the module’s runtime registers through the LPC bus is disabled (transactions are ignored; SYNC cycle is

not generated).

The module’s internal clock is disabled (the module is not functional) to lower the power consumption.

When a VSB3-powered module (GPIO and SWC) is disabled, the following takes place:

The host system resources of the logical device (IRQ and runtime address range) are unassigned.

Access to the standard and device speciﬁc Logical Device conﬁguration registers through the LPC bus remains en-

abled.

Access to the module’s runtime registers through the LPC bus is disabled (transactions are ignored; SYNC cycle is

not generated).

The module is functional.

PC87373 数据表(PDF) 40 Page - National Semiconductor (TI)