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PC87373 数据表(PDF) 64 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 PC87373
功能描述  LPC SuperI/O with Glue Functions
PDF  174 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

PC87373 数据表(HTML) 64 Page - National Semiconductor (TI)

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3.0 Device Architecture and Configuration (Continued)
64
www.national.com
Revision 1.1
3.14.3 GPIO Pin Select Register (GPSEL)
This register selects the GPIO pin (port number and bit number) to be configured (i.e., which register is accessed via the
GPIO pin configuration registers). GPSEL is reset to 00h.
Power Well: VSB3
Location:
Index F0h
Type:
R/W
3.14.4 GPIO Pin Configuration Register 1 (GPCFG1)
This register reflects, for both read and write, the register currently selected by the GPIO Pin Select register. All of the GPIO
pin configuration registers have a common bit structure, as shown below. An exception to this is GPIO14 pin of Port 1, which
lacks the EVDBNC, EVPOL and EVTYPE bits (the bits are reserved). All of the GPCFG1 registers are reset to 00h.
Power Well: VSB3
Location:
Index F1h
Type:
Varies per bit
Bit
76543210
Name
Reserved
PORTSEL
Reserved
PINSEL
Reset
00000000
Bit
Description
7-6
Reserved.
5-4
PORTSEL (Port Select). These bits select the GPIO port to be configured:
00:
Port 0 (default)
01:
Port 1 (all other values are reserved)
3
Reserved.
2-0
PINSEL (Pin Select). These bits select the GPIO pin of the selected port to be configured:
000:
Pin 0 (default)
001-111: Binary value of pin numbers 1-7, respectively
Bit
76543210
Name
Reserved
EVDBNC1
1. This bit is reserved for the GPIO14 pin in Port 1.
EVPOL1
EVTYPE1
LOCKCFP
PUPCTL
OUTTYPE
OUTENA
Reset
00000000
Bit
Type
Description
7
Reserved.
6
R/W or
RO
EVDBNC (Event Debounce Enable). This bit enables the debounce circuit in the event input path of
the selected GPIO pin. The event is detected after a predetermined debouncing period (see Section 5.3
on page 75).
0: Disabled (default)
1: Enabled
5
R/W or
RO
EVPOL (Event Polarity). This bit defines the polarity of the wake-up signal that issues an event from
the selected GPIO pin (see Section 5.3 on page 75).
0: Falling edge or low level input (default)
1: Rising edge or high level input



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