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PC87373 数据表(PDF) 99 Page - National Semiconductor (TI) |
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PC87373 数据表(HTML) 99 Page - National Semiconductor (TI) |
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99 / 174 page ![]() 6.0 System Wake-Up Control (SWC) (Continued) 99 www.national.com Revision 1.1 6.4.4 General-Purpose Status 1 Register 0 (GPE1_STS_0) This register contains “child” events 0-7 of the GPE1_STS register. The status bits behave according to the Sticky Status Bit definition in the ACPI Specification (i.e., the bit is set when the hardware signal is high and is only cleared by the software writing 1 to it). Power Well: VSB3 Location: Offset 08h Type: R/W1C 6.4.5 General-Purpose Status 1 Register 1 (GPE1_STS_1) This register contains “child” events 8-15 of the GPE1_STS register. The status bits behave according to the Sticky Status Bit definition in the ACPI Specification (i.e., the bit is set when the hardware signal is high and is only cleared by the software writing 1 to it). Power Well: VSB3 Location: Offset 09h Type: R/W1C Bit 76543210 Name GPIOE07 _STS GPIOE06 _STS GPIOE05 _STS GPIOE04 _STS GPIOE03 _STS GPIOE02 _STS GPIOE01 _STS GPIOE00 _STS Reset 00000000 Bit Description 7 GPIOE07_STS (GPIOE07 Event Status). Indicates that an active event has been detected at pin 7 of GPIOE Port 0. The event has programmable polarity and the debounce option (see Section 5.3 on page 75). The bit is set by an active level at the GPIOE07 pin. Writing 1 clears this bit; writing 0 is ignored. 0: Inactive since last cleared (default) 1: An active event has occurred 6-0 GPIOE06_STS to GPIOE00_STS (GPIOE06 to GPIOE00 Event Status). Same as above for pins 6-0 of GPIOE Port 0. Bit 76543210 Name Reserved GPIOE13 _STS GPIOE12 _STS GPIOE11 _STS GPIOE10 _STS Reset 00000000 Bit Description 7-4 Reserved. 3 GPIOE13_STS (GPIO13 Event Status). Indicates that an active event has been detected at pin 3 of GPIOE Port 1. The event has programmable polarity and the debounce option (see Section 5.3 on page 75). The bit is set by an active level at the GPIOE13 pin. Writing 1 clears this bit; writing 0 is ignored. 0: Inactive since last cleared (default) 1: An active event has occurred 2-0 GPIOE12_STS to GPIOE10_STS (GPIOE12 to GPIOE10 Event Status). Same as above for pins 2-0 of GPIOE Port 1. |
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