PC87373 datasheet(14/174 Pages) NSC

14 / 174 page

1.0 Signal/Pin Connection and Description (Continued)

www.national.com

Revision 1.1

1.2 BUFFER TYPES AND SIGNAL/PIN DIRECTORY

The signal DC characteristics of the pins described in Section 1.4 on page 16 are denoted by buffer type symbols, which are

defined in Table 1 and described in further detail in Section 13.2 on page 153. The pin multiplexing information refers to two

different types of multiplexing:

Multiplexed, denoted by a slash (/) between pins in the diagrams in Section 1.1. Pins are shared between two differ-

ent functions. Each function is associated with different board connectivity. Normally, the function selection is deter-

mined by the board design and cannot be changed dynamically. The multiplexing options must be conﬁgured by the

BIOS on power-up in order to comply with the board implementation.

Multiple Mode, denoted by an underscore (_) between pins in the diagrams in Section 1.1. Pins have two or more

modes of operation within the same function. These modes are associated with the same external (board)

connectivity. Mode selection may be controlled by the device driver through the registers of the functional block and

do not require a special BIOS setup on power-up. These pins are not considered multiplexed pins from the PC87373

conﬁguration perspective. The mode selection method (registers and bits), as well as the signal speciﬁcation in each

mode, are described within the functional description of the relevant functional block.

Table 1. Buffer Types

Symbol

Description

INGP

Input, Game Port compatible, with Schmitt Trigger

INT

Input, TTL compatible

INTS

Input, TTL compatible, with Schmitt Trigger

INTS4

Input, TTL compatible, with 400 mV Schmitt Trigger

INPCI

Input, PCI 3.3V compatible

INULR

Input, power, resistor protected (not characterized)

Input, analog (0-5.5V tolerant)

Op/n

Output, TTL/CMOS compatible, push-pull buffer capable of sourcing p mA

and sinking n mA

ODn

Output, TTL/CMOS compatible, open-drain buffer capable of sinking n mA

OPCI

Output, PCI 3.3V compatible,

Output, analog (0-5.5V tolerant)

SWSM

Input/Output switch, SMBus compatible

PWR

Power pin

GND

Ground pin

PC87373 数据表(PDF) 14 Page - National Semiconductor (TI)

PC87373 数据表(HTML) 14 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载