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CS5530 数据表(PDF) 142 Page - National Semiconductor (TI) |
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CS5530 数据表(HTML) 142 Page - National Semiconductor (TI) |
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142 / 241 page  www.national.com 142 Revision 4.1 Register Descriptions (Continued) Table 4-5. Function 2: PCI Header Registers for IDE Controller Summary F2 Index Width (Bits) Type Name Reset Value Reference (Table 4-17) 00h-01h 16 RO Vendor Identification Register 1078h Page 184 02h-03h 16 RO Device Identification Register 0102h Page 184 04h-05h 16 R/W PCI Command Register 0000h Page 184 06h-07h 16 RO PCI Status Register 0280h Page 184 08h 8 RO Device Revision ID Register 00h Page 184 09h-0Bh 24 RO PCI Class Code Register 010180h Page 184 0Ch 8 RO PCI Cache Line Size Register 00h Page 184 0Dh 8 RO PCI Latency Timer Register 00h Page 184 0Eh 8 RO PCI Header Type Register 00h Page 184 0Fh 8 RO PCI BIST Register 00h Page 184 10h-1Fh -- -- Reserved -- Page 184 20h-23h 32 R/W Base Address Register (F2BAR): Sets base address for I/O mapped IDE controller configuration registers (summarized in Table 4-6). 00000001h Page 184 24h-FFh -- -- Reserved -- Page 184 Table 4-6. F2BAR: IDE Controller Configuration Registers Summary F2BAR+ I/O Offset Width (Bits) Type Name Reset Value Reference (Table 4-18) 00h 8 R/W IDE Bus Master 0 Command Register: Primary 00h Page 185 01h -- -- Not Used -- Page 185 02h 8 R/W IDE Bus Master 0 Status Register: Primary 00h Page 185 03h -- -- Not Used -- Page 185 04h-07h 32 R/W IDE Bus Master 0 PRD Table Address: Primary 00000000h Page 185 08h 8 R/W IDE Bus Master 1 Command Register: Secondary 00h Page 185 09h -- -- Not Used -- Page 185 0Ah 8 R/W IDE Bus Master 1 Status Register: Secondary 00h Page 186 0Bh -- -- Not Used -- Page 186 0Ch-0Fh 32 R/W IDE Bus Master 1 PRD Table Address: Secondary 00000000h Page 186 10h-1Fh -- -- Not Used -- Page 186 20h-23h 32 R/W Channel 0 Drive 0: PIO Register 0000E132h Page 186 24h-27h 32 R/W Channel 0 Drive 0: DMA Control Register 00017771h Page 187 28h-2Bh 32 R/W Channel 0 Drive 1: PIO Register 0000E132h Page 187 2Ch-2Fh 32 R/W Channel 0 Drive 1: DMA Control Register 00017771h Page 187 30h-33h 32 R/W Channel 1 Drive 0: PIO Register 0000E132h Page 187 34h-37h 32 R/W Channel 1 Drive 0: DMA Control Register 00017771h Page 187 38h-3Bh 32 R/W Channel 1 Drive 1: PIO Register 0000E132h Page 187 3Ch-3Fh 32 R/W Channel 1 Drive 1: DMA Control Register 00017771h Page 187 |
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