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CS5530 数据表(PDF) 165 Page - National Semiconductor (TI) |
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CS5530 数据表(HTML) 165 Page - National Semiconductor (TI) |
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165 / 241 page ![]() Revision 4.1 165 www.national.com Register Descriptions (Continued) Index 8Ah General Purpose Timer 2 Count Register (R/W) Reset Value = 00h 7:0 General Purpose Timer 2 Count: This field represents the load value for GP Timer 2. This value can represent either an 8-bit or 16-bit counter (configured in F0 Index 8Bh[5]). It is loaded into the counter when the timer is enabled (F0 Index 83h[1] = 1). Once the timer is enabled and a transition occurs on GPIO7, the timer is re-loaded. The counter is decremented with each clock of the configured timebase. Upon expiration of the counter, an SMI is gener- ated and the top level of status is F1BAR+Memory Offset 00h/02h[9] and the second level of status is reported in F1BAR+Memory Offset 04h/06h[1]). Once expired, this counter must be re-initialized by either disabling and enabling it, or writing a new count value here. For GPIO7 to act as the reload for this counter, it must be enabled as such (F0 Index 8Bh[2]) and be configured as an input (F0 Index 90h[7]). This counter’s timebase can be configured as 1 msec or 1 sec in F0 Index 8Bh[3]. Index 8Bh General Purpose Timer 2 Control Register (R/W) Reset Value = 00h 7 Re-trigger General Purpose Timer 1 on Secondary Hard Disk Activity: 0 = Disable; 1 = Enable. Any access to the secondary hard disk drive address range selected in F0 Index 93h[4] reloads GP Timer 1. 6 VGA Timer Base: Selects timebase for VGA Timer Register (F0 Index 8Eh): 0 = 1 ms; 1 = 32 µs. 5 General Purpose Timer 2 Shift: GP Timer 2 is treated as an 8-bit or 16-bit timer: 0 = 8-bit; 1 = 16-bit. As an 8-bit timer, the count value is loaded into GP Timer 2 Count Register (F0 Index 8Ah). As a 16-bit timer, the value loaded into GP Timer 2 Count Register is shifted left by eight bits, the lower eight bits become zero, and this 16-bit value is used as the count for GP Timer 2. 4 General Purpose Timer 1 Shift: GP Timer 1 is treated as an 8-bit or 16-bit timer: 0 = 8-bit; 1 = 16-bit. As an 8-bit timer, the count value is that loaded into GP Timer 1 Count Register (F0 Index 88h). As a 16-bit timer, the value loaded into GP Timer 1 Count Register is shifted left by eight bit, the lower eight bits become zero, and this 16-bit value is used as the count for GP Timer 1. 3 Time Basis for General Purpose Timer 2: Selects timebase for GP Timer 2 (F0 Index 8Ah): 0 = 1 sec; 1 = 1 msec. 2 Re-trigger General Purpose Timer 2 on GPIO7 Pin Transition: A configured transition on the GPIO7 pin reloads GP Timer 2 (F0 Index 8Ah): 0 = Disable; 1 = Enable. F0 Index 92h[7] selects whether a rising- or a falling-edge transition acts as a reload. For GPIO7 to work here, it must first be configured as an input (F0 Index 90h[7] = 0). 1:0 Reserved: Set to 0. Index 8Ch IRQ Speedup Timer Count Register (R/W) Reset Value = 00h 7:0 IRQ Speedup Timer Count: This field represents the load value for the IRQ speedup timer. It is loaded into the counter when Suspend Modulation is enabled (F0 Index 96h[0] = 1) and an INTR or an access to I/O Port 061h occurs. When the event occurs, the Suspend Modulation logic is inhibited, permitting full performance operation of the CPU. Upon expira- tion, no SMI is generated; the Suspend Modulation begins again. The IRQ speedup timer’s timebase is 1 ms. This speedup mechanism allows instantaneous response to system interrupts for full-speed interrupt processing. A typi- cal value here would be 2 to 4 ms. Index 8Dh Video Speedup Timer Count Register (R/W) Reset Value = 00h 7:0 Video Speedup Timer Count: This field represents the load value for the Video speedup timer. It is loaded into the counter when Suspend Modulation is enabled (F0 Index 96h[0] = 1) and any access to the graphics controller occurs. When a video access occurs, the Suspend Modulation logic is inhibited, permitting full-performance operation of the CPU. Upon expiration, no SMI is generated; the Suspend Modulation begins again. The video speedup timer’s timebase is 1 ms. This speedup mechanism allows instantaneous response to video activity for full speed during video processing calcula- tions. A typical value here would be 50 to 100 ms. Index 8Eh VGA Timer Count Register (R/W) Reset Value = 00h 7:0 VGA Timer Load Value: This field represents the load value for VGA Timer. It is loaded into the counter when the timer is enabled (F0 Index 83h[3] = 1). The counter is decremented with each clock of the configured timebase (F0 Index 8Bh[6]). Upon expiration of the counter, an SMI is generated and the status is reported in F1BAR+Memory Offset 00h/02h[6] (only). Once expired, this counter must be re-initialized by either disabling and enabling it, or writing a new count value here. This counter’s timebase is 1 ms. Table 4-14. F0 Index xxh: PCI Header and Bridge Configuration Registers (Continued) Bit Description |
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