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PC87373 数据表(PDF) 132 Page - National Semiconductor (TI) |
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PC87373 数据表(HTML) 132 Page - National Semiconductor (TI) |
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132 / 174 page ![]() 11.0 Musical Instrument Digital Interface (MIDI) Port (Continued) 132 www.national.com Revision 1.1 11.2.5 MIDI Signals Routing Control Logic The MIDI Signals Routing Control Logic controls the various routing options available for the MIDI transmit and receive sig- nals. It is controlled by the MIDI Control register (MCNTL; see Section 11.3.6 on page 138). These routing options are not part of the Legacy definition of the MIDI Port. 11.2.6 Operation Modes The MIDI Port can be operated in one of the following modes: q Pass-Thru (Non-UART) Mode (default) q UART Mode Pass-Thru (Non-UART) Mode After a hardware reset, the MIDI Port is in Pass-Thru mode. In this mode, transmission is disabled by default, and all writes to the MIDI Data Out register (MDO; see Section 11.3.3 on page 136) are ignored. Transmission in this mode may be enabled by setting bit 4 of the MIDI Control register (MCNTL; see Section 11.3.6 on page 138). Receive in Pass-Thru mode is enabled, and a 16-byte Receive FIFO is available. Reading the MIDI Data In register (MDI; see Section 11.3.2 on page 136) in this mode returns the oldest data stored in the Receive FIFO. If serial data is received while the Receive FIFO is full with data that has not yet been read, the last received data is lost, thus maintaining the data that was previously stored in the Receive Buffer. When in Pass-Thru mode, the MIDI Port responds to host commands as follows: q 3Fh puts the MIDI Port in UART mode. Also, in response to this command, the MIDI Port puts an acknowledge byte of FEh in the Receive buffer. q A0h-A7h or ABh causes the MIDI Port to put an acknowledge byte of FEh followed by a data byte of 00h in the Re- ceive buffer. q ACh causes the MIDI Port to put an acknowledge byte of FEh, followed by a data byte of 15h, in the Receive buffer. q ADh causes the MIDI Port to put an acknowledge byte of FEh, followed by a data byte of 01h, in the Receive buffer. q AFh causes the MIDI Port to put an acknowledge byte of FEh, followed by a data byte of 64h, in the Receive buffer. q FFh resets the MIDI Port to its initial state, including all the bits of the MSTAT register. In response, the MIDI Port puts an acknowledge of FEh in the Receive buffer. This command is usually referred to as the MIDI Reset Command. q The MIDI Port responds to all other commands by putting an acknowledge byte of FEh in the Receive buffer. Putting the acknowledge byte of FEh in the Receive buffer is equivalent to receiving a data byte. Therefore, once an ac- knowledge byte is put in the Receive buffer, it causes the Receive Buffer Empty status flag (see Section 11.3.4 on page 137) to be cleared, which may also cause a MIDI Port interrupt request to be issued. When the Receive FIFO is disabled, switching from Pass-Thru mode to UART mode causes data stored in the Receive buff- er to be lost. After switching to UART mode, the MIDI Port is blocked for receiving until the acknowledge byte is read from the Receive buffer. If a command is issued to the MIDI Port while the MIDI Communication Engine is in the middle of a byte transfer (the Start bit has been transmitted or received), the execution of the command and the response are postponed until the current byte transfer is completed. After each MIDI Port operation in Pass-Thru mode, the MIDI Status register (MSTAT; see Section 11.3.4 on page 137) is updated accordingly. UART Mode Entering UART mode is done by software, by giving the MIDI Port command of 3Fh. Once in UART mode, both Transmit and Receive are enabled. In addition, the two 16-byte Receive and Transmit FIFOs are automatically enabled. In UART mode, data written to the MDO register is placed in the Transmit FIFO, from which it is taken by the MIDI Commu- nication Engine and transmitted via the MDTX pin to the MIDI device. Likewise, whenever the Transmit FIFO is not empty, the next byte is taken out by the Communication Engine and transmitted via the MDTX pin to the MIDI device. Whenever serial data is received by the Communication Engine via the MDRX pin, it is de-serialized and put in the Receive FIFO. Reading the MDI register returns the next byte in the Receive FIFO. The MDI register should not be read while the Receive FIFO is empty. If serial data is received while the Receive FIFO is full, this data is lost and not stored in the Receive FIFO, thus keeping the data that was previously stored in the Receive FIFO. |
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