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LAN9252/ML 数据表(PDF) 18 Page - Microchip Technology

部件名 LAN9252/ML
功能描述  2/3-Port EtherCAT® Slave Controller with Integrated Ethernet PHYs
PDF  329 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

LAN9252/ML 数据表(HTML) 18 Page - Microchip Technology

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LAN9252
DS00001909A-page 18
 2015 Microchip Technology Inc.
Note 1:
In copper mode, either channel 1 or 2 may function as the transmit pair while the other channel functions as
the receive pair. The pin name symbols for the twisted pair pins apply to a normal connection. If HP Auto-
MDIX is enabled and a reverse connection is detected or manually selected, the RX and TX pins will be
swapped internally.
Note 2:
Configuration strap pins are identified by an underlined symbol name. Configuration strap values are
latched on power-on reset or RST# de-assertion. Refer to Section 7.0, "Configuration Straps," on page 51
for more information.
1
Port A FX
Signal Detect
(SD)
FXSDA
ILVPECL
Port A Fiber Signal Detect. When FX-LOS mode is
not selected, this pin functions as the Signal Detect
input from the external transceiver. A level above
2 V (typ.) indicates valid signal.
When FX-LOS mode is selected, the input buffer is
disabled.
Port A FX
Loss Of Signal
(LOS)
FXLOSA
IS
(PU)
Port A Fiber Loss of Signal. When FX-LOS mode is
selected (via fx_los_strap_1), this pin functions as
the Loss of Signal input from the external trans-
ceiver. A high indicates LOS while a low indicates
valid signal.
When FX-LOS mode is not selected, the input buffer
and pull-up are disabled.
Port A FX-SD
Enable Strap
FXSDENA
AI
Port A FX-SD Enable. When FX-LOS mode is not
selected, this strap input selects between FX-SD
and copper twisted pair mode. A level above 1 V
(typ.) selects FX-SD.
When FX-LOS mode is selected, the input buffer is
disabled.
See Note 2.
Note:
Port A is connected to the EtherCAT port 0 or 2.
TABLE 3-4:
LAN PORT B PIN DESCRIPTIONS
Num
Pins
Name
Symbol
Buffer
Type
Description
1
Port B TP TX/RX
Positive
Channel 1
TXPB
AIO
Port B Twisted Pair Transmit/Receive Positive
Channel 1. See Note 3
Port B FX TX
Positive
OLVPECL
Port B Fiber Transmit Positive.
1
Port B TP TX/RX
Negative
Channel 1
TXNB
AIO
Port B Twisted Pair Transmit/Receive Negative
Channel 1. See Note 3.
Port B FX TX
Negative
OLVPECL
Port B Fiber Transmit Negative.
TABLE 3-3:
LAN PORT A PIN DESCRIPTIONS (CONTINUED)
Num
Pins
Name
Symbol
Buffer
Type
Description



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