LAN9252SLASHML datasheet(21/329 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS00001909A-page 21

LAN9252

Note 6:

A series terminating resistor is recommended for the best PCB signal integrity.

Note 7:

An external supplemental pull-up may be needed, depending upon the input current loading of the external

MAC/PHY device.

Note 8:

Configuration strap pins are identified by an underlined symbol name. Configuration strap values are

latched on power-on reset or RST# de-assertion. Refer to Section 7.0, "Configuration Straps," on page 51

for more information.

TABLE 3-6:

ETHERCAT MII PORT & CONFIGURATION STRAP PIN DESCRIPTIONS

Num

Pins

Name

Symbol

Buffer

Type

Description

25 MHz Clock

MII_CLK25

VO12

Note 6

This pin is a free-running 25 MHz clock that can be

used as the clock input to the PHY.

Receive Data

MII Port

MII_RXD[3:0]

VIS

(PD)

These pins are the receive data from the external

PHY.

Receive Data

Valid MII Port

MII_RXDV

VIS

(PD)

This pin is the receive data valid signal from the

external PHY.

Receive Error

MII Port

MII_RXER

VIS

(PD)

This pin is the receive error signal from the external

PHY.

Receive Clock

MII Port

MII_RXCLK

VIS

(PD)

This pin is the receive clock from the external PHY.

Transmit Data

MII Port

MII_TXD[3:0]

VO8

These pins are the transmit data to the external

PHY.

MII Transmit

Timing Shift

Configuration

Strap

TX_SHIFT[1:0]

VIS

(PU)

Note 7

These straps configure the value of the external MII

Bus TX timing shift hard-strap. See Note 8.

TX_SHIFT[1] is on MII_TXD[3] and TX_SHIFT[0]

is on MII_TXD[2].

Transmit Data

Enable MII Port

MII_TXEN

VO8

This pin is the transmit data enable signal to the

external PHY.

Link Status

MII Port

MII_LINK

VIS

This pin is the provided by the PHY to indicate that a

100 Mbit/s Full Duplex link is established. The polar-

ity is configurable via the link_pol_strap_mii strap.

SMI Clock

MII_MDC

VO8

This pin is the serial management clock to the exter-

nal PHY.

1SMI Data

MII_MDIO

VIS/VO8

This pin is the serial management interface data

input/output to the external PHY.

Note:

An external pull-up is required to ensure

that the non-driven state of the MDIO

signal is a logic one.

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