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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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LAN9252/ML 数据表(PDF) 17 Page - Microchip Technology |
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LAN9252/ML 数据表(HTML) 17 Page - Microchip Technology |
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17 / 329 page  2015 Microchip Technology Inc. DS00001909A-page 17 LAN9252 3.3 Pin Descriptions This section contains descriptions of the various LAN9252 pins. The pin descriptions have been broken into functional groups as follows: • LAN Port A Pin Descriptions • LAN Port B Pin Descriptions • LAN Port A & B Power and Common Pin Descriptions • EtherCAT MII Port & Configuration Strap Pin Descriptions • Host Bus Pin Descriptions • SPI/SQI Pin Descriptions • EtherCAT Distributed Clock Pin Descriptions • EtherCAT Digital I/O and GPIO Pin Descriptions • EEPROM Pin Descriptions • LED & Configuration Strap Pin Descriptions • Miscellaneous Pin Descriptions • JTAG Pin Descriptions • Core and I/O Power Pin Descriptions TABLE 3-3: LAN PORT A PIN DESCRIPTIONS Num Pins Name Symbol Buffer Type Description 1 Port A TP TX/RX Positive Channel 1 TXPA AIO Port A Twisted Pair Transmit/Receive Positive Channel 1. See Note 1 Port A FX TX Positive OLVPECL Port A Fiber Transmit Positive. 1 Port A TP TX/RX Negative Channel 1 TXNA AIO Port A Twisted Pair Transmit/Receive Negative Channel 1. See Note 1. Port A FX TX Negative OLVPECL Port A Fiber Transmit Negative. 1 Port A TP TX/RX Positive Channel 2 RXPA AIO Port A Twisted Pair Transmit/Receive Positive Channel 2. See Note 1. Port A FX RX Positive AI Port A Fiber Receive Positive. 1 Port A TP TX/RX Negative Channel 2 RXNA AIO Port A Twisted Pair Transmit/Receive Negative Channel 2. See Note 1. Port A FX RX Negative AI Port A Fiber Receive Negative. |
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