| 数据搜索系统,热门电子元器件搜索 |
|
LAN9252/ML 数据表(PDF) 24 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
LAN9252/ML 数据表(HTML) 24 Page - Microchip Technology |
|
24 / 329 page ![]() LAN9252 DS00001909A-page 24 2015 Microchip Technology Inc. Note 9: Although this pin is an output for SPI instructions, it includes a pull-up since it is also SIO bit 1. TABLE 3-8: SPI/SQI PIN DESCRIPTIONS Num Pins Name Symbol Buffer Type Description 1 SPI/SQI Slave Chip Select SCS# VIS (PU) This pin is the SPI/SQI slave chip select input. When low, the SPI/SQI slave is selected for SPI/SQI transfers. When high, the SPI/SQI serial data out- put(s) is(are) 3-stated. 1 SPI/SQI Slave Serial Clock SCK VIS (PU) This pin is the SPI/SQI slave serial clock input. 4 SPI/SQI Slave Serial Data Input/Output SIO[3:0] VIS/VO8 (PU) These pins are the SPI/SQI slave data input and output for multiple bit I/O. SPI Slave Serial Data Input SI VIS (PU) This pin is the SPI slave serial data input. SI is shared with the SIO0 pin. SPI Slave Serial Data Output SO VO8 (PU) Note 9 This pin is the SPI slave serial data output. SO is shared with the SIO1 pin. TABLE 3-9: ETHERCAT DISTRIBUTED CLOCK PIN DESCRIPTIONS Num Pins Name Symbol Buffer Type Description 2 Sync SYNC[1] SYNC[0] VO8 These pins are the Distributed Clock Sync (OUT) or Latch (IN) signals. The direction is bitwise configurable. Note: These signals are not driven (high impedance) until the EEPROM is loaded. Latch LATCH[1] LATCH[0] VIS TABLE 3-10: ETHERCAT DIGITAL I/O AND GPIO PIN DESCRIPTIONS Num Pins Name Symbol Buffer Type Description 16 General Purpose Input GPI[15:0] VIS These pins are the general purpose inputs and are directly mapped into the General Purpose Inputs Register . Consistency of the general purpose inputs is not provided. General Purpose Output GPO[15:0] VO8 These pins are the general purpose outputs and reflect the values of the General Purpose Outputs Register without watchdog protection. Note: These signals are not driven (high impedance) until the EEPROM is loaded. 16 Digital I/O DIGIO[15:0] VIS/VO8 These pins are the input/output or bidirectional data. Note: These signals are not driven (high impedance) until the EEPROM is loaded. 1 Output Valid OUTVALID VO8 This pin indicates that the outputs are valid and can be captured into external registers. Note: The signal is not driven (high imped- ance) until the EEPROM is loaded. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |