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Revision 4.1

Functional Description (Continued)

3.7.2

VSA Technology Support Hardware

The CS5530 I/O companion incorporates the required

hardware in order to support the Virtual System Architec-

ture (VSA) technology for capture and playback of audio

using an external codec. This eliminates much of the

hardware traditionally associated with industry standard

audio functions.

XpressAUDIO software provides 16-bit compatible sound.

This software is available to OEMs for incorporation into

the system BIOS ROM.

3.7.2.1

VSA Technology

VSA technology provides a framework to enable software

implementation of traditionally hardware-only compo-

nents. VSA technology software executes in System Man-

agement

Mode

(SMM),

enabling

execute

transparently to the operating system, drivers and appli-

cations.

The VSA technology design is based upon a simple

model for replacing hardware components with software.

Hardware to be virtualized is merely replaced with simple

access detection circuitry which asserts the SMI# (System

Management Interrupt) pin when hardware accesses are

detected. The current execution stream is immediately

preempted, and the processor enters SMM. The SMM

system software then saves the processor state, initial-

izes the VSA technology execution environment, decodes

the SMI source and dispatches handler routines which

have registered requests to service the decoded SMI

source. Once all handler routines have completed, the

processor

state

restored and normal execution

resumes. In this manner, hardware accesses are trans-

parently replaced with the execution of SMM handler soft-

ware.

Historically, SMM software was used primarily for the sin-

gle purpose of facilitating active power management for

notebook designs. That software’s only function was to

manage the power up and down of devices to save

power. With high performance processors now available,

it is feasible to implement, primarily in SMM software, PC

capabilities traditionally provided by hardware. In contrast

to power management code, this virtualization software

generally has strict performance requirements to prevent

application

performance

from

being

significantly

impacted.

3.7.2.2

Audio SMI Related Registers

The SMI related registers consist of:

• Second Level Audio SMI Status Registers

• I/O Trap SMI and Fast Write Status Register

• I/O Trap SMI Enable Register

The Top SMI Status Mirror and Status Registers are the

top level of hierarchy for the SMI Handler in determining

thesource of anSMI. These tworegistersare at

F1BAR+Memory

Offset

00h

(Status

Mirror)

and

F1BAR+Memory Offset 02h (Status). The registers are

identical except that reading the register at F1BAR+Mem-

ory Offset 02h clears the status.

Second Level Audio SMI Status Registers -The sec-

ond level of audio SMI status reporting is set up very

much like the top level. There are two status reporting

registers, one “read only” (mirror) and one “read to clear”.

The data returned by reading either offset is the same

(i.e., SMI was caused by an audio related event). The dif-

ference between F3BAR+Memory Offset 12h (mirror) and

10h is in the ability to clear the SMI source at 10h.

Figure 3-22 shows an SMI tree for checking and clearing

the source of an audio SMI. Only the audio SMI bit is

detailed here. For details regarding the remaining bits in

the Top SMI Status Mirror and Status Registers refer to

Table 4-16 "F1BAR+Memory Offset xxh: SMI Status and

ACPI Timer Registers" on page 180.

I/O Trap SMI and Fast Write Status Register - This 32-

bit read-only register (F3BAR+Memory Offset 14h) not

only indicates if the enabled I/O trap generated an SMI,

but also contains Fast Path Write related bits.

I/O Trap SMI Enable Register - The I/O Trap SMI Enable

specified I/O addresses and configures generation for I/O

events. It also contains the enabling bit for Fast Path

Write/Read features.

Status Fast Path Read - If enabled, the CS5530 inter-

cepts and responds to reads to several status registers.

This speeds up operations, and prevents SMI generation

for reads to these registers. This process is called Status

Fast Path Read. Status Fast Path Read is enabled via

F3BAR+Memory Offset 18h[4].

In Status Fast Path Read the CS5530 responds to reads

of the following addresses:

388h-38Bh

2x0h, 2x1, 2x2h, 2x3, 2x8 and 2x9h

Note that if neither sound card nor FM I/O mapping is

enabled, then status read trapping is not possible.

Fast Path Write - If enabled, the CS5530 captures cer-

tain writes to several I/O locations. This feature prevents

two SMIs from being asserted for write operations that are

known to take two accesses (the first access is an index

and the second is data). This process is called Fast Path

Write. Fast Path Write is enabled in via F3BAR+Memory

Offset 18h[11].

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