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PC87373 数据表(PDF) 120 Page - National Semiconductor (TI) |
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PC87373 数据表(HTML) 120 Page - National Semiconductor (TI) |
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120 / 174 page ![]() 9.0 Glue Functions (Continued) 120 www.national.com Revision 1.1 9.2.3 Resume Reset This function generates the RSMRST signal by sensing the voltage level at the VSB5 analog input (see specification in Sec- tion 13.2.6 on page 154). The RSMRST signal serves both as a Power-Up reset and as a “Brown-Out” reset for the system resume power well (powered by the VSB3 or VSB5 supplies). The Resume Reset circuit compares the voltage at the VSB5 input with a threshold value (VTRIP). When the VSB3 supply voltage is active, the circuit generates the RSMRST active low output signal, as follows: q When VSB5 rises above VTRIP, the RSMRST signal switches from low to high after a tRD delay. q When VSB5 falls below VTRIP, the RSMRST signal switches from high to low after a tFD5 delay. q When a glitch shorter than tGA (the time VSB5 is below VTRIP) occurs at the VSB5 input, the RSMRST signal is not guaranteed to react (remains high). The Resume Reset circuit is powered by the VSB3 supply. When the VSB5 supply voltage is active, the circuit compares the VSB3 power supply voltage with the threshold value (VSB3ON or VSB3OFF); see Section 13.1.5 on page 152. As a result, the RSMRST active low output signal is generated, as follows: q When VSB3 rises above VSB3ON, the RSMRST signal switches from low to high after a tRD delay. q When VSB3 falls below VSB3OFF, the RSMRST signal switches from high to low after a tFD3 delay. q When a glitch shorter than tGA (the time VSB3 is below VSB3OFF) occurs at the VSB3 input, the RSMRST signal is not guaranteed to react (remains high). When the VSB3 power supply is off, the RSMRST output is at low level (active) having an internal impedance of ZOFF. The delays in RSMRST switching, generated by the Resume Reset circuit, are independent of the toggling of any of the clock domains of the PC87373 device (32 KHz, 48 MHz or LPC). Figure 25 shows the behavior of the RSMRST output at VSB3 and VSB5 switching. Figure 25. RSMRST at VSB5 and VSB3 Switching tRD tFD3 RSMRST VSB3 VSB5 VSB3ON a. VSB5 Switching, VSB3 Steady b. VSB3 Switching, VSB5 Steady tRD tFD5 RSMRST VSB5 VSB3 VTRIP tGA Brown-Out Glitch VSB3OFF tGA Brown-Out Glitch |
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