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数据搜索系统，热门电子元器件搜索 |
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PC87373 数据表(PDF) 146 Page - National Semiconductor (TI) |
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PC87373 数据表(HTML) 146 Page - National Semiconductor (TI) |
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146 / 174 page  12.0 Legacy Functional Blocks (Continued) 146 www.national.com Revision 1.1 Table 59. Bank Selection Encoding BSR Bits Bank Selected Functionality 76543210 0 xxxxxxx 0 UART (Serial Port 1 and Serial Port 2) 1 0 xxxxxx 1 1 1 xxxx 1 x 1 1 1 xxxxx 1 1 11100000 2 11100100 3 Table 60. Bank 1 Register Map Offset Mnemonic Register Name Type 00h LBGD(L) Legacy Baud Generator Divisor Port (Low Byte) R/W 01h LBGD(H) Legacy Baud Generator Divisor Port (High Byte) R/W 02h Reserved 03h LCR/BSR Line Control/Bank Select R/W 04h-07h Reserved Table 61. Bank 2 Register Map Offset Mnemonic Register Name Type 00h BGD(L) Baud Generator Divisor Port (Low Byte) R/W 01h BGD(H) Baud Generator Divisor Port (High Byte) R/W 02h EXCR1 Extended Control1 R/W 03h LCR/BSR Line Control/Bank Select R/W 04h EXCR2 Extended Control2 R/W 05h Reserved 06h TXFLV TX_FIFO Level R/W 07h RXFLV RX_FIFO Level R/W Table 62. Bank 3 Register Map Offset Mnemonic Register Name Type 00h MRID Module Revision ID RO 01h SH_LCR Shadow of LCR (Read Only) RO 02h SH_FCR Shadow of FIFO Control (Read Only) RO 03h LCR/BSR Line Control/Bank Select R/W 04h-07h Reserved |
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