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PC87373 数据表(PDF) 143 Page - National Semiconductor (TI) |
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PC87373 数据表(HTML) 143 Page - National Semiconductor (TI) |
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143 / 174 page  12.0 Legacy Functional Blocks (Continued) 143 www.national.com Revision 1.1 12.2.3 Parallel Port Bitmap Summary The Parallel Port functional block bitmaps are grouped according to first and second level offsets. Table 55. Parallel Port Registers at Second Level Offset Offset Mnemonic Register Name Type 00h Control0 Extended Control 0 R/W 02h Control2 Extended Control 1 R/W 04h Control4 Extended Control 4 R/W 05h PP Confg0 Configuration 0 R/W Table 56. Parallel Port Bitmap Summary for First Level Offset Register Bits Offset Mnemonic 76543210 000h DATAR Data Bits AFIFO Address Bits 001h DSR Printer Status ACK Status PE Status SLCT Status ERR Status Reserved EPP Time- Out Status 002h DCR Reserved Direction Control Interrupt Enable PP Input Control Printer Initialization Control Automatic Line Feed Control Data Strobe Control 003h ADDR EPP Device or Register Selection Address Bits 004h DATA0 EPP Device or R/W Data 005h DATA1 EPP Device or R/W Data 006h DATA2 EPP Device or R/W Data 007h DATA3 EPP Device or R/W Data 400h CFIFO Data Bits 400h DFIFO Data Bits 400h TFIFO Data Bits 400h CNFGA Reserved Bit 7 of PP Confg0 Reserved 401h CNFGB Reserved Interrupt Request Value Interrupt Select Reserved DMA Channel Select 402h ECR ECP Mode Control ECP Interrupt Mask ECP DMA Enable ECP Interrupt Service FIFO Full FIFO Empty 403h EIR Reserved Second Level Offset 404h EDR Data Bits 405h EAR FIFO Tag Reserved |
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