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PC87373 数据表(PDF) 147 Page - National Semiconductor (TI) |
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PC87373 数据表(HTML) 147 Page - National Semiconductor (TI) |
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147 / 174 page  12.0 Legacy Functional Blocks (Continued) 147 www.national.com Revision 1.1 12.3.4 SP1 and SP2 Bitmap Summary Table 63. Bank 0 Bitmap Register Bits Offset Mnemonic 76543210 00h RXD Receiver Data Bits TXD Transmitter Data Bits 01h IER1 1. Non-Extended Mode. Reserved MS_IE LS_IE TXLDL_IE RXHDL_IE IER2 2. Extended Mode. Reserved TXEMP_IE Reserved MS_IE LS_IE TXLDL_IE RXHDL_IE 02h EIR1 FEN1 FEN0 Reserved RXFT IPR1 IPR0 IPF EIR2 Reserved TXEMP_EV Reserved MS_EV LS_EV or TXHLT_EV TXLDL_EV RXHDL_EV FCR RXFTH1 RXFTH0 TXFTH1 TXFTH0 Reserved TXSR RXSR FIFO_EN 03h LCR3 3. When bit 7 of this register is set to 1, bits 6-0 of BSR select the bank, as shown in Table 59 on page 146. BKSE SBRK STKP EPS PEN STB WLS1 WLS0 BSR3 BKSE Bank Select 04h MCR1 Reserved LOOP ISEN or DCDLP RILP RTS DTR MCR2 Reserved TX_DFR Reserved RTS DTR 05h LSR ER_INF TXEMP TXRDY BRK FE PE OE RXDA 06h MSR DCD RI DSR CTS DDCD TERI DDSR DCTS 07h SPR1 Scratch Data ASCR2 Reserved RXF_TOUT |
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