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LAN9252/ML 数据表(PDF) 183 Page - Microchip Technology

部件名 LAN9252/ML
功能描述  2/3-Port EtherCAT® Slave Controller with Integrated Ethernet PHYs
PDF  329 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

LAN9252/ML 数据表(HTML) 183 Page - Microchip Technology

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 2015 Microchip Technology Inc.
DS00001909A-page 183
LAN9252
Note 20:
Register bits designated as NASR are reset when the PHY Reset is generated via the Reset Control Reg-
ister (RESET_CTL). The NASR designation is only applicable when the Soft Reset (PHY_SRST) bit of the
PHY x Basic Control Register (PHY_BASIC_CONTROL_x) is set.
Index (In Decimal): 3.32805
Size:
16 bits
Bits
Description
Type
Default
15:0
Wakeup Filter Byte Mask [63:48]
R/W/
NASR
Note 20
0000h
Index (In Decimal): 3.32806
Size:
16 bits
Bits
Description
Type
Default
15:0
Wakeup Filter Byte Mask [47:32]
R/W/
NASR
Note 20
0000h
Index (In Decimal): 3.32807
Size:
16 bits
Bits
Description
Type
Default
15:0
Wakeup Filter Byte Mask [31:16]
R/W/
NASR
Note 20
0000h
Index (In Decimal): 3.32808
Size:
16 bits
Bits
Description
Type
Default
15:0
Wakeup Filter Byte Mask [15:0]
R/W/
NASR
Note 20
0000h



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