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LAN9252/ML 数据表(PDF) 186 Page - Microchip Technology

部件名 LAN9252/ML
功能描述  2/3-Port EtherCAT® Slave Controller with Integrated Ethernet PHYs
PDF  329 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

LAN9252/ML 数据表(HTML) 186 Page - Microchip Technology

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LAN9252
DS00001909A-page 186
 2015 Microchip Technology Inc.
11.2.16.31 PHY x MAC Receive Address C Register (PHY_RX_ADDRC_x)
Note 23:
Register bits designated as NASR are reset when the PHY Reset is generated via the Reset Control Reg-
ister (RESET_CTL). The NASR designation is only applicable when the Soft Reset (PHY_SRST) bit of the
PHY x Basic Control Register (PHY_BASIC_CONTROL_x) is set.
Index (In Decimal): 3.32867
Size:
16 bits
Bits
Description
Type
Default
15:0
Physical Address [15:0]
R/W/
NASR
Note 23
FFFFh



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