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LAN9252/ML 数据表(PDF) 227 Page - Microchip Technology

部件名 LAN9252/ML
功能描述  2/3-Port EtherCAT® Slave Controller with Integrated Ethernet PHYs
PDF  329 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

LAN9252/ML 数据表(HTML) 227 Page - Microchip Technology

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 2015 Microchip Technology Inc.
DS00001909A-page 227
LAN9252
12.14.1
TYPE REGISTER
12.14.2
REVISION REGISTER
12.14.3
BUILD REGISTER
Offset:
0000h
Size:
8 bits
Bits
Description
ECAT
Type
PDI
Type
Default
7:0
EtherCAT Controller Type
C0h = Microchip.
RO
RO
C0h
Offset:
0001h
Size:
8 bits
Bits
Description
ECAT
Type
PDI
Type
Default
7:0
EtherCAT Controller Revision
RO
RO
02h
Offset:
0002h-0003h
Size:
16 bits
Bits
Description
ECAT
Type
PDI
Type
Default
15:0
EtherCAT Controller Build
[7:4] = minor version
[3:0] = Maintenance version
RO
RO
0000h
Note:
For EtherCAT Core CSR registers longer than one byte, the LSB has the lowest address and the MSB the
highest address.



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