LAN9252SLASHML datasheet(141/329 Pages) MICROCHIP

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 2015 Microchip Technology Inc.

DS00001909A-page 141

LAN9252

11.2.14

100BASE-FX OPERATION

When set for 100BASE-FX operation, the scrambler and MTL-3 blocks are disable and the analog RX and TX pins are

changed to differential LVPECL pins and connect through external terminations to the external Fiber transceiver. The

differential LVPECL pins support a signal voltage range compatible with SFF (LVPECL) and SFP (reduced LVPECL)

type transceivers.

While in 100BASE-FX operation, the quality of the receive signal is provided by the external transceiver as either an

open-drain, CMOS level, Loss of Signal (SFP) or a LVPECL Signal Detect (SFF).

11.2.14.1

100BASE-FX Far End Fault Indication

Since Auto-Negotiation is not specified for 100BASE-FX, its Remote Fault capability is unavailable. Instead, 100BASE-

FX provides an optional Far-End Fault function.

When no signal is being received, the Far-End Fault feature transmits a special Far-End Fault Indication to its far-end

peer. The Far-End Fault Indication is sent only when a physical error condition is sensed on the receive channel.

The Far-End Fault Indication is comprised of three or more repeating cycles, each of 84 ONEs followed by a single

ZERO. This signal is sent in-band and is readily detectable but is constructed so as to not satisfy the 100BASE-X carrier

sense criterion.

Far-End Fault is implemented through the Far-End Fault Generate, Far-End Fault Detect, and the Link Monitor pro-

cesses. The Far-End Fault Generate process is responsible for sensing a receive channel failure (signal_status=OFF)

and transmitting the Far-End Fault Indication in response. The transmission of the Far-End Fault Indication may start or

stop at any time depending only on signal_status. The Far-End Fault Detect process continuously monitors the RX pro-

cess for the Far-End Fault Indication. Detection of the Far-End Fault Indication disables the station by causing the Link

Monitor process to de-assert link_status, which in turn causes the station to source IDLEs.

Far-End Fault is enabled by default while in 100BASE-FX mode via the Far End Fault Indication Enable (FEFI_EN) of

the PHY x Special Control/Status Indication Register (PHY_SPECIAL_CONTROL_STAT_IND_x).

11.2.14.2

100BASE-FX Enable and LOS/SD Selection

100BASE-FX operation is enabled by the use of the FX mode straps (fx_mode_strap_1 and fx_mode_strap_2) and is

reflected in the 100BASE-FX Mode (FX_MODE) bit in the PHY x Special Modes Register (PHY_SPECIAL_MODES_x).

Loss of Signal mode is selected for both PHYs by the three level FXLOSEN strap input pin. The three levels correspond

to Loss of Signal mode for a) neither PHY (less than 1 V (typ.)), b) PHY A (greater than 1 V (typ.) but less than 2 V (typ.))

or c) both PHYs (greater than 2 V (typ.)). It is not possible to select Loss of Signal mode for only PHY B.

If Loss of Signal mode is not selected, then Signal Detect mode is selected, independently, by the FXSDENA or FXS-

DENB strap input pin. When greater than 1 V (typ.), Signal Detect mode is enabled, when less than 1 V (typ.), copper

twisted pair is enabled.

Table 11-9 and Table 11-10 summarize the selections.

Note:

The FXSDENA strap input pin is shared with the FXSDA pin and the FXSDENB strap input pin is shared

with the FXSDB pin. As such, the LVPECL levels ensure that the input is greater than 1 V (typ.) and that

Signal Detect mode is selected. When TP copper is desired, the Signal Detect input function is not required

and the pin should be set to 0 V.

Care must be taken such that an non-powered or disabled transceiver does not load the Signal Detect input

below the valid LVPECL level.

TABLE 11-9:

100BASE-FX LOS, SD AND TP COPPER SELECTION PHY A

FXLOSEN

FXSDENA

PHY Mode

<1 V (typ.)

TP copper

>1 V (typ.)

100BASE-FX Signal Detect

>1 V (typ.)

n/a

100BASE-FX LOS

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