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LAN9252/ML 数据表(PDF) 143 Page - Microchip Technology |
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LAN9252/ML 数据表(HTML) 143 Page - Microchip Technology |
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143 / 329 page  2015 Microchip Technology Inc. DS00001909A-page 143 LAN9252 13 PHY x MMD Access Control Register (PHY_MMD_ACCESS) Extended 14 PHY x MMD Access Address/Data Register (PHY_MMD_ADDR_DATA) Extended 16 PHY x EDPD NLP / Crossover Time / EEE Configuration Register (PHY_EDPD_CFG_x) Vendor- specific 17 PHY x Mode Control/Status Register (PHY_MODE_CONTROL_STATUS_x) Vendor- specific 18 PHY x Special Modes Register (PHY_SPECIAL_MODES_x) Vendor- specific 24 PHY x TDR Patterns/Delay Control Register (PHY_TDR_PAT_DELAY_x) Vendor- specific 25 PHY x TDR Control/Status Register (PHY_TDR_CONTROL_STAT_x) Vendor- specific 26 PHY x Symbol Error Counter Register Vendor- specific 27 PHY x Special Control/Status Indication Register (PHY_SPECIAL_CON- TROL_STAT_IND_x) Vendor- specific 28 PHY x Cable Length Register (PHY_CABLE_LEN_x) Vendor- specific 29 PHY x Interrupt Source Flags Register (PHY_INTERRUPT_SOURCE_x) Vendor- specific 30 PHY x Interrupt Mask Register (PHY_INTERRUPT_MASK_x) Vendor- specific 31 PHY x Special Control/Status Register (PHY_SPECIAL_CONTROL_STATUS_x) Vendor- specific TABLE 11-11: PHY A AND B MII SERIALLY ACCESSIBLE CONTROL AND STATUS REGISTERS Index Register Name (SYMBOL) Group |
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