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LAN9252/ML 数据表(PDF) 214 Page - Microchip Technology

部件名 LAN9252/ML
功能描述  2/3-Port EtherCAT® Slave Controller with Integrated Ethernet PHYs
PDF  329 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

LAN9252/ML 数据表(HTML) 214 Page - Microchip Technology

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LAN9252
DS00001909A-page 214
 2015 Microchip Technology Inc.
12.13 EtherCAT CSR and Process Data RAM Access Registers (Directly Addressable)
This section details the directly addressable System CSRs, outside of the EtherCAT Core, which are related to the Eth-
erCAT Core. For information on how to access EtherCAT registers, refer to Section 12.11, "EtherCAT CSR and Process
Data RAM Access," on page 208. The EtherCAT Core registers are detailed in Section 12.14, "EtherCAT Core CSR
Registers (Indirectly Addressable)," on page 223.
TABLE 12-13: ETHERCAT PROCESS RAM AND CSR ACCESS REGISTERS
Address
Register Name (Symbol)
000h-01Ch
EtherCAT Process RAM Read Data FIFO (ECAT_PRAM_RD_DATA)
020h-03Ch
EtherCAT Process RAM Write Data FIFO (ECAT_PRAM_WR_DATA)
300h
EtherCAT CSR Interface Data Register (ECAT_CSR_DATA)
304h
EtherCAT CSR Interface Command Register (ECAT_CSR_CMD)
308h
EtherCAT Process RAM Read Address and Length Register (ECAT_PRAM_RD_ADDR_LEN)
30Ch
EtherCAT Process RAM Read Command Register (ECAT_PRAM_RD_CMD)
310h
EtherCAT Process RAM Write Address and Length Register (ECAT_PRAM_WR_ADDR_LEN)
314h
EtherCAT Process RAM Write Command Register (ECAT_PRAM_WR_CMD)



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