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CS5530 数据表(PDF) 134 Page - National Semiconductor (TI) |
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CS5530 数据表(HTML) 134 Page - National Semiconductor (TI) |
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134 / 241 page ![]() www.national.com 134 Revision 4.1 Functional Description (Continued) 3.8.5 Display Interface The CS5530 interfaces directly to a variety of display devices including conventional analog CRT displays, TFT flat panels, the National Semiconductor CS9210 DSTN Controller, or optionally to digital NTSC/PAL encoder devices. 3.8.5.1 Video DACs The CS5530 incorporates triple 8-bit video Digital-to-Ana- log Converters (DACs) for interfacing directly to CRT dis- plays. The video DACs are capable of operation up to 170 MHz for supporting up to 1600x1200 display at a 75 Hz refresh rate. 3.8.5.2 VESA DDC2B / DPMS The CS5530 supports the VESA DDC2B and DPMS stan- dards for enhanced monitor communications and power management support. 3.8.5.3 Flat Panel Support The CS5530 also interfaces directly to industry standard 18-bit Active Matrix Thin-Film-Transistor (TFT) flat panels. The CS5530 includes 24-bit to 18-bit dithering logic to increase the apparent number of colors displayed on 18- bit flat panels. In addition, the CS5530 incorporates power sequencing logic to simplify the design of a portable system. The flat panel port of the CS5530 may optionally drive the CS9210 DSTN Controller device for color dual-scan dis- play (DSTN) support. If flat panel support is not required, the flat panel output port may be used to supply digital video data to one of several types of NTSC/PAL encoder devices on the market. 6 Flat Panel Power Enable: The transition of this bit initiates a flat panel power-up or power-down sequence: 0 -> 1 = Power-up flat panel; 1 -> 0 = Power-down flat panel. 5 DAC Power-down (active low): This bit must be set to power-up the video DACs. It can be cleared to power-down the video DACs when not in use. 0 = DACs are powered down; 1 = DACs are powered up. 4 Reserved: Set to 0. 3 DAC Blank Enable: This bit enables the blank to the video DACs. 0 = DACs are constantly blanked; 1 = DACs are blanked normally. 2 CRT Vertical Sync Enable: Enables the CRT vertical sync. Used for VESA DPMS support. 0 = Disable; 1 = Enable. 1 CRT Horizontal Sync Enable: Enables the CRT horizontal sync. Used for VESA DPMS support. 0 = Disable; 1 = Enable. 0 Display Enable: Enables the graphics display pipeline. It is used as a reset for the display control logic. 0 = Reset display control logic; 1 = Enable display control logic Table 3-75. Display Configuration Register (Continued) Bit Description |
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