CS5530 datasheet(154/241 Pages) NSC

154 / 241 page

www.national.com

154

Revision 4.1

Index 53h

Alternate CPU Support Register (R/W)

Reset Value = 00h

Reserved: Set to 0.

Game Port Write Blocks ISA: Block ISA cycle on game port (I/O Port 200h and 201h) write:

0 = Disable; 1 = Enable.

Bidirectional SMI Enable: 0 = Disable; 1 = Enable.

This bit must be set to 0.

Game Port Read Block ISA: Block ISA cycle on game port (I/O Port 200h and 201h) read: 0 = Disable; 1 = Enable.

Game Port Write SMI: Allow SMI generation on writes to game port (I/O Port 200h and 201h):

0 = Disable; 1 = Enable.

Top level SMI status is reported at F1BAR+Memory Offset 00h/02h[0].

Second level SMI status is reported at F0 Index 84h/F4h[4].

For “Game Port Read SMI”, see F0 Index 83h[4].

RTC Enable/RTC Pin Configuration: 0 = SMEMW# (Pin AF3) and SMEMR# (Pin AD4), RTC decode disabled;

1 = RTCCS# (Pin AF3) and RTCALE (Pin AD4), RTC decode enabled.

Note: The RTC Index Shadow Register (F0 Index BBh) is independent of the setting of this bit.

Reserved: Set to 1.

Generate SMI on A20M# toggle: 0 = Disable; 1 = Enable. This bit must be set to 1.

SMI status is reported in F1BAR+Memory Offset 00h/02h[7] (only).

Index 54h-59h

Reserved

Index 5Ah

Decode Control Register 1 (R/W)

Reset Value = 03h

Secondary Floppy Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port

372h-375h and 377h: 0 = Subtractive; 1 = Positive.

Primary Floppy Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 3F2h-3F5h and

3F7h: 0 = Subtractive; 1 = Positive.

COM4 Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 2E8h-2EFh:

0 = Subtractive; 1 = Positive.

COM3 Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 3E8h-3EFh:

0 = Subtractive; 1 = Positive.

COM2 Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 2F8h-2FFh:

0 = Subtractive; 1 = Positive.

COM1 Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port 3F8h-3FFh:

0 = Subtractive; 1 = Positive.

Keyboard Controller Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port

060h and 064h (and 062h/066h if enabled): 0 = Subtractive; 1 = Positive.

Real Time Clock Positive Decode: Selects PCI positive or subtractive decoding for accesses to I/O Port

070h and 071h: 0 = Subtractive; 1 = Positive.

Note: Positive decoding by the CS5530 speeds up the I/O cycle time. These I/O Ports do not exist in the CS5530. It is assumed that

if positive decode is enabled, the port exists on the ISA bus.

Table 4-14. F0 Index xxh: PCI Header and Bridge Configuration Registers (Continued)

Bit

Description

CS5530 数据表(PDF) 154 Page - National Semiconductor (TI)

CS5530 数据表(HTML) 154 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载

链接网址

CS5530 数据表(PDF) 154 Page - National Semiconductor (TI)

CS5530 数据表(HTML) 154 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表 下载

链接网址

数据表下载