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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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PC87373 数据表(PDF) 161 Page - National Semiconductor (TI) |
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PC87373 数据表(HTML) 161 Page - National Semiconductor (TI) |
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161 / 174 page  13.0 Device Characteristics (Continued) 161 www.national.com Revision 1.1 13.4.3 Clock Timing High-Frequency Clock Timing Figure 51. High-Frequency Clock Waveform Timing Figure 52. CLOCKI14 and Internal 48 MHz Domain Timing Symbol Figure Clock Input Parameters Reference Conditions CLOCKI14 Units Min Typ Max tCH 51 Clock High Pulse Width1 1. Not tested. Guaranteed by design. 29.5 ns tCL 51 Clock Low Pulse Width1 29.5 ns tCP 51 Clock Period1 (50%-50%) 69.14 69.84 70.54 ns FCK − Clock Frequency FCKTYP − 1% 14.31818 FCKTYP +1% MHz tCR 51 Clock Rise Time1 (20%-80%) 52 2. Recommended value ns tCF 51 Clock Fall Time1 (80%-20%) 52 ns t14MW 52 Clock Wake-Up Time VDD3 stable to clock start toggling System dependent t14MVAL 52 Clock Valid Time1 Clock start toggling to clock valid System dependent Sym. Fig. Internal Clock Parameter Reference Conditions INT48M Units Min Typ Max tCP 51 Clock Period1 (50%-50%) 1. Not tested. Guaranteed by characterization. 20.83 ns FCK − Clock Frequency 48 MHz t48MD 52 Clock Wake-Up Time1 After Clock Generator enabled 500 µs tCL tCP tCH VIH VIH VIL VIL VIL VIH tCF tCR CLOCKI14 (14.31818 MHz) t14MW 48 MHz Domain VDD3 (Power) VDD3ONmin tCP (CLOCKI14) t14MVAL CKVALID bit (Internal) Enable Clock Generator (Internal) t48MD tCP (48 MHz) (Internal) |
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